From 0f098853f2b1523efd045ccc915a1415718ec58e Mon Sep 17 00:00:00 2001
From: TuxSH <1922548+TuxSH@users.noreply.github.com>
Date: Fri, 15 Sep 2023 23:15:58 +0200
Subject: [PATCH] Add isb and prevent CPU from postponing threadOnException
 memory writes

---
 libctru/include/3ds/synchronization.h | 6 ++++++
 libctru/include/3ds/thread.h          | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/libctru/include/3ds/synchronization.h b/libctru/include/3ds/synchronization.h
index d8edfdc..60cc2c8 100755
--- a/libctru/include/3ds/synchronization.h
+++ b/libctru/include/3ds/synchronization.h
@@ -42,6 +42,12 @@ static inline void __dmb(void)
 	__asm__ __volatile__("mcr p15, 0, %[val], c7, c10, 5" :: [val] "r" (0) : "memory");
 }
 
+/// Performs an Instruction Synchronization Barrier (officially "flush prefetch buffer") operation.
+static inline void __isb(void)
+{
+	__asm__ __volatile__("mcr p15, 0, %[val], c7, c5, 4" :: [val] "r" (0) : "memory");
+}
+
 /// Performs a clrex operation.
 static inline void __clrex(void)
 {
diff --git a/libctru/include/3ds/thread.h b/libctru/include/3ds/thread.h
index 68c99eb..d37fdf3 100644
--- a/libctru/include/3ds/thread.h
+++ b/libctru/include/3ds/thread.h
@@ -117,4 +117,7 @@ static inline void threadOnException(ExceptionHandler handler, void* stack_top,
 	*(u32*)(tls + 0x40) = (u32)handler;
 	*(u32*)(tls + 0x44) = (u32)stack_top;
 	*(u32*)(tls + 0x48) = (u32)exception_data;
+
+	__dsb();
+	__isb();
 }