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Add proctex GPU register names and enumerations from the 3dbrew Wiki

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fincs 2015-12-02 12:04:13 +01:00
parent 33ba77db4d
commit 3657571591
2 changed files with 77 additions and 15 deletions
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62
libctru/include/3ds/gpu/enums.h
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@ -8,10 +8,18 @@
#define GPU_TEXTURE_MAG_FILTER(v) (((v)&0x1)<<1)
/// Creates a texture minification filter parameter from a @ref GPU_TEXTURE_FILTER_PARAM
#define GPU_TEXTURE_MIN_FILTER(v) (((v)&0x1)<<2)
/// Creates a texture mipmap filter parameter from a @ref GPU_TEXTURE_FILTER_PARAM
#define GPU_TEXTURE_MIP_FILTER(v) (((v)&0x1)<<24)
/// Creates a texture wrap S parameter from a @ref GPU_TEXTURE_WRAP_PARAM
#define GPU_TEXTURE_WRAP_S(v) (((v)&0x3)<<12)
/// Creates a texture wrap T parameter from a @ref GPU_TEXTURE_WRAP_PARAM
#define GPU_TEXTURE_WRAP_T(v) (((v)&0x3)<<8)
/// Creates a texture mode parameter from a @ref GPU_TEXTURE_MODE_PARAM
#define GPU_TEXTURE_MODE(v) (((v)&0x7)<<28)
/// Texture parameter indicating ETC1 texture.
#define GPU_TEXTURE_ETC1_PARAM BIT(5)
/// Texture parameter indicating shadow texture.
#define GPU_TEXTURE_SHADOW_PARAM BIT(20)
/// Creates a combiner buffer write configuration.
#define GPU_TEV_BUFFER_WRITE_CONFIG(stage0, stage1, stage2, stage3) ((stage0) | ((stage1) << 1) | ((stage2) << 2) | ((stage3) << 3))
@ -69,6 +77,60 @@ typedef enum
GPU_ETC1A4 = 0xC, ///< ETC1 texture compression + 4-bit Alpha
} GPU_TEXCOLOR;
/// Procedural texture clamp modes.
typedef enum
{
GPU_PT_CLAMP_TO_ZERO = 0, ///< Clamp to zero.
GPU_PT_CLAMP_TO_EDGE = 1, ///< Clamp to edge.
GPU_PT_REPEAT = 2, ///< Symmetrical repeat.
GPU_PT_MIRRORED_REPEAT = 3, ///< Mirrored repeat.
GPU_PT_PULSE = 4, ///< Pulse.
} GPU_PROCTEX_CLAMP;
/// Procedural texture mapping functions.
typedef enum
{
GPU_PT_U = 0, ///< U
GPU_PT_U2 = 1, ///< U2
GPU_PT_V = 2, ///< V
GPU_PT_V2 = 3, ///< V2
GPU_PT_ADD = 4, ///< U+V
GPU_PT_ADD2 = 5, ///< U2+V2
GPU_PT_SQRT2 = 6, ///< sqrt(U2+V2)
GPU_PT_MIN = 7, ///< min
GPU_PT_MAX = 8, ///< max
GPU_PT_RMAX = 9, ///< rmax
} GPU_PROCTEX_MAPFUNC;
/// Procedural texture shift values.
typedef enum
{
GPU_PT_NONE = 0, ///< No shift.
GPU_PT_ODD = 1, ///< Odd shift.
GPU_PT_EVEN = 2, ///< Even shift.
} GPU_PROCTEX_SHIFT;
/// Procedural texture filter values.
typedef enum
{
GPU_PT_NEAREST = 0, ///< Nearest-neighbor
GPU_PT_LINEAR = 1, ///< Linear interpolation
GPU_PT_NEAREST_MIP_NEAREST = 2, ///< Nearest-neighbor with mipmap using nearest-neighbor
GPU_PT_LINEAR_MIP_NEAREST = 3, ///< Linear interpolation with mipmap using nearest-neighbor
GPU_PT_NEAREST_MIP_LINEAR = 4, ///< Nearest-neighbor with mipmap using linear interpolation
GPU_PT_LINEAR_MIP_LINEAR = 5, ///< Linear interpolation with mipmap using linear interpolation
} GPU_PROCTEX_FILTER;
/// Procedural texture LUT IDs.
typedef enum
{
GPU_LUT_NOISE = 0, ///< Noise table
GPU_LUT_RGBMAP = 1, ///< RGB mapping function table
GPU_LUT_ALPHAMAP = 2, ///< Alpha mapping function table
GPU_LUT_COLOR = 3, ///< Color table
GPU_LUT_COLORDIF = 4, ///< Color difference table
} GPU_PROCTEX_LUTID;
/// Supported color buffer formats.
typedef enum
{

30
libctru/include/3ds/gpu/registers.h
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@ -182,22 +182,22 @@
#define GPUREG_00A5 0x00A5 ///< Unknown.
#define GPUREG_00A6 0x00A6 ///< Unknown.
#define GPUREG_00A7 0x00A7 ///< Unknown.
#define GPUREG_TEXUNIT3_PROTEX0 0x00A8 ///< Unknown.
#define GPUREG_TEXUNIT3_PROTEX1 0x00A9 ///< Unknown.
#define GPUREG_TEXUNIT3_PROTEX2 0x00AA ///< Unknown.
#define GPUREG_TEXUNIT3_PROTEX3 0x00AB ///< Unknown.
#define GPUREG_TEXUNIT3_PROTEX4 0x00AC ///< Unknown.
#define GPUREG_TEXUNIT3_PROTEX5 0x00AD ///< Unknown.
#define GPUREG_TEXUNIT3_PROCTEX0 0x00A8 ///< Unknown.
#define GPUREG_TEXUNIT3_PROCTEX1 0x00A9 ///< Unknown.
#define GPUREG_TEXUNIT3_PROCTEX2 0x00AA ///< Unknown.
#define GPUREG_TEXUNIT3_PROCTEX3 0x00AB ///< Unknown.
#define GPUREG_TEXUNIT3_PROCTEX4 0x00A ///< Unknown.
#define GPUREG_TEXUNIT3_PROCTEX5 0x00D ///< Unknown.
#define GPUREG_00AE 0x00AE ///< Unknown.
#define GPUREG_PROTEX_LUT 0x00AF ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA0 0x00B0 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA1 0x00B1 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA2 0x00B2 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA3 0x00B3 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA4 0x00B4 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA5 0x00B5 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA6 0x00B6 ///< Unknown.
#define GPUREG_PROTEX_LUT_DATA7 0x00B7 ///< Unknown.
#define GPUREG_PROCTEX_LUT 0x00AF ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA0 0x00B0 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA1 0x00B1 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA2 0x00B2 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA3 0x00B3 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA4 0x00B4 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA5 0x00B5 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA6 0x00B6 ///< Unknown.
#define GPUREG_PROCTEX_LUT_DATA7 0x00B7 ///< Unknown.
#define GPUREG_00B8 0x00B8 ///< Unknown.
#define GPUREG_00B9 0x00B9 ///< Unknown.
#define GPUREG_00BA 0x00BA ///< Unknown.