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Start the Great Refactor with some GPU refactoring/deprecating

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This commit is contained in:
fincs 2015-09-05 20:16:47 +02:00
parent 11a5001f33
commit 5fd4a726ff
10 changed files with 759 additions and 725 deletions
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2
libctru/Makefile
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@ -41,7 +41,7 @@ INCLUDES := include
#---------------------------------------------------------------------------------
ARCH := -march=armv6k -mtune=mpcore -mfloat-abi=hard
CFLAGS := -g -Wall -O2 -mword-relocations \
CFLAGS := -g -Wall -Werror -O2 -mword-relocations \
-fno-strict-aliasing \
-fomit-frame-pointer -ffast-math \
$(ARCH)

1
libctru/include/3ds.h
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@ -41,6 +41,7 @@ extern "C" {
#include <3ds/gpu/gx.h>
#include <3ds/gpu/gpu.h>
#include <3ds/gpu/gpu-old.h>
#include <3ds/gpu/shbin.h>
#include <3ds/gpu/shaderProgram.h>

232
libctru/include/3ds/gpu/enums.h Normal file
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@ -0,0 +1,232 @@
#pragma once
//tex param
#define GPU_TEXTURE_MAG_FILTER(v) (((v)&0x1)<<1) //takes a GPU_TEXTURE_FILTER_PARAM
#define GPU_TEXTURE_MIN_FILTER(v) (((v)&0x1)<<2) //takes a GPU_TEXTURE_FILTER_PARAM
#define GPU_TEXTURE_WRAP_S(v) (((v)&0x3)<<12) //takes a GPU_TEXTURE_WRAP_PARAM
#define GPU_TEXTURE_WRAP_T(v) (((v)&0x3)<<8) //takes a GPU_TEXTURE_WRAP_PARAM
// Combiner buffer write config
#define GPU_TEV_BUFFER_WRITE_CONFIG(stage0, stage1, stage2, stage3) (stage0 | (stage1 << 1) | (stage2 << 2) | (stage3 << 3))
typedef enum
{
GPU_NEAREST = 0x0,
GPU_LINEAR = 0x1,
}GPU_TEXTURE_FILTER_PARAM;
typedef enum
{
GPU_CLAMP_TO_EDGE = 0x0,
GPU_CLAMP_TO_BORDER = 0x1,
GPU_REPEAT = 0x2,
GPU_MIRRORED_REPEAT = 0x3,
}GPU_TEXTURE_WRAP_PARAM;
typedef enum
{
GPU_TEXUNIT0 = 0x1,
GPU_TEXUNIT1 = 0x2,
GPU_TEXUNIT2 = 0x4
} GPU_TEXUNIT;
typedef enum{
GPU_RGBA8=0x0,
GPU_RGB8=0x1,
GPU_RGBA5551=0x2,
GPU_RGB565=0x3,
GPU_RGBA4=0x4,
GPU_LA8=0x5,
GPU_HILO8=0x6,
GPU_L8=0x7,
GPU_A8=0x8,
GPU_LA4=0x9,
GPU_L4=0xA,
GPU_ETC1=0xB,
GPU_ETC1A4=0xC
}GPU_TEXCOLOR;
typedef enum
{
GPU_NEVER = 0,
GPU_ALWAYS = 1,
GPU_EQUAL = 2,
GPU_NOTEQUAL = 3,
GPU_LESS = 4,
GPU_LEQUAL = 5,
GPU_GREATER = 6,
GPU_GEQUAL = 7
}GPU_TESTFUNC;
typedef enum
{
GPU_SCISSOR_DISABLE = 0, // disable scissor test
GPU_SCISSOR_INVERT = 1, // exclude pixels inside the scissor box
// 2 is the same as 0
GPU_SCISSOR_NORMAL = 3, // exclude pixels outside of the scissor box
} GPU_SCISSORMODE;
typedef enum
{
GPU_STENCIL_KEEP = 0, // old_stencil
GPU_STENCIL_ZERO = 1, // 0
GPU_STENCIL_REPLACE = 2, // ref
GPU_STENCIL_INCR = 3, // old_stencil + 1 saturated to [0, 255]
GPU_STENCIL_DECR = 4, // old_stencil - 1 saturated to [0, 255]
GPU_STENCIL_INVERT = 5, // ~old_stencil
GPU_STENCIL_INCR_WRAP = 6, // old_stencil + 1
GPU_STENCIL_DECR_WRAP = 7 // old_stencil - 1
} GPU_STENCILOP;
typedef enum
{
GPU_WRITE_RED = 0x01,
GPU_WRITE_GREEN = 0x02,
GPU_WRITE_BLUE = 0x04,
GPU_WRITE_ALPHA = 0x08,
GPU_WRITE_DEPTH = 0x10,
GPU_WRITE_COLOR = 0x0F,
GPU_WRITE_ALL = 0x1F
} GPU_WRITEMASK;
typedef enum
{
GPU_BLEND_ADD = 0,
GPU_BLEND_SUBTRACT = 1,
GPU_BLEND_REVERSE_SUBTRACT = 2,
GPU_BLEND_MIN = 3,
GPU_BLEND_MAX = 4
} GPU_BLENDEQUATION;
typedef enum
{
GPU_ZERO = 0,
GPU_ONE = 1,
GPU_SRC_COLOR = 2,
GPU_ONE_MINUS_SRC_COLOR = 3,
GPU_DST_COLOR = 4,
GPU_ONE_MINUS_DST_COLOR = 5,
GPU_SRC_ALPHA = 6,
GPU_ONE_MINUS_SRC_ALPHA = 7,
GPU_DST_ALPHA = 8,
GPU_ONE_MINUS_DST_ALPHA = 9,
GPU_CONSTANT_COLOR = 10,
GPU_ONE_MINUS_CONSTANT_COLOR = 11,
GPU_CONSTANT_ALPHA = 12,
GPU_ONE_MINUS_CONSTANT_ALPHA = 13,
GPU_SRC_ALPHA_SATURATE = 14
} GPU_BLENDFACTOR;
typedef enum
{
GPU_LOGICOP_CLEAR = 0,
GPU_LOGICOP_AND = 1,
GPU_LOGICOP_AND_REVERSE = 2,
GPU_LOGICOP_COPY = 3,
GPU_LOGICOP_SET = 4,
GPU_LOGICOP_COPY_INVERTED = 5,
GPU_LOGICOP_NOOP = 6,
GPU_LOGICOP_INVERT = 7,
GPU_LOGICOP_NAND = 8,
GPU_LOGICOP_OR = 9,
GPU_LOGICOP_NOR = 10,
GPU_LOGICOP_XOR = 11,
GPU_LOGICOP_EQUIV = 12,
GPU_LOGICOP_AND_INVERTED = 13,
GPU_LOGICOP_OR_REVERSE = 14,
GPU_LOGICOP_OR_INVERTED = 15
} GPU_LOGICOP;
typedef enum{
GPU_BYTE = 0,
GPU_UNSIGNED_BYTE = 1,
GPU_SHORT = 2,
GPU_FLOAT = 3
}GPU_FORMATS;
//defines for CW ?
typedef enum{
GPU_CULL_NONE = 0,
GPU_CULL_FRONT_CCW = 1,
GPU_CULL_BACK_CCW = 2
}GPU_CULLMODE;
#define GPU_ATTRIBFMT(i, n, f) (((((n)-1)<<2)|((f)&3))<<((i)*4))
/**
* Texture combiners sources
*/
typedef enum{
GPU_PRIMARY_COLOR = 0x00,
GPU_TEXTURE0 = 0x03,
GPU_TEXTURE1 = 0x04,
GPU_TEXTURE2 = 0x05,
GPU_TEXTURE3 = 0x06,
GPU_PREVIOUS_BUFFER = 0x0D,
GPU_CONSTANT = 0x0E,
GPU_PREVIOUS = 0x0F,
}GPU_TEVSRC;
/**
* Texture RGB combiners operands
*/
typedef enum{
GPU_TEVOP_RGB_SRC_COLOR = 0x00,
GPU_TEVOP_RGB_ONE_MINUS_SRC_COLOR = 0x01,
GPU_TEVOP_RGB_SRC_ALPHA = 0x02,
GPU_TEVOP_RGB_ONE_MINUS_SRC_ALPHA = 0x03,
GPU_TEVOP_RGB_SRC0_RGB = 0x04,
GPU_TEVOP_RGB_0x05 = 0x05,
GPU_TEVOP_RGB_0x06 = 0x06,
GPU_TEVOP_RGB_0x07 = 0x07,
GPU_TEVOP_RGB_SRC1_RGB = 0x08,
GPU_TEVOP_RGB_0x09 = 0x09,
GPU_TEVOP_RGB_0x0A = 0x0A,
GPU_TEVOP_RGB_0x0B = 0x0B,
GPU_TEVOP_RGB_SRC2_RGB = 0x0C,
GPU_TEVOP_RGB_0x0D = 0x0D,
GPU_TEVOP_RGB_0x0E = 0x0E,
GPU_TEVOP_RGB_0x0F = 0x0F,
}GPU_TEVOP_RGB;
/**
* Texture ALPHA combiners operands
*/
typedef enum{
GPU_TEVOP_A_SRC_ALPHA = 0x00,
GPU_TEVOP_A_ONE_MINUS_SRC_ALPHA = 0x01,
GPU_TEVOP_A_SRC0_RGB = 0x02,
GPU_TEVOP_A_SRC1_RGB = 0x04,
GPU_TEVOP_A_SRC2_RGB = 0x06,
}GPU_TEVOP_A;
/**
* Texture combiner functions
*/
typedef enum{
GPU_REPLACE = 0x00,
GPU_MODULATE = 0x01,
GPU_ADD = 0x02,
GPU_ADD_SIGNED = 0x03,
GPU_INTERPOLATE = 0x04,
GPU_SUBTRACT = 0x05,
GPU_DOT3_RGB = 0x06 //RGB only
}GPU_COMBINEFUNC;
#define GPU_TEVSOURCES(a,b,c) (((a))|((b)<<4)|((c)<<8))
#define GPU_TEVOPERANDS(a,b,c) (((a))|((b)<<4)|((c)<<8))
typedef enum{
GPU_TRIANGLES = 0x0000,
GPU_TRIANGLE_STRIP = 0x0100,
GPU_TRIANGLE_FAN = 0x0200,
GPU_UNKPRIM = 0x0300 // ?
}GPU_Primitive_t;
typedef enum{
GPU_VERTEX_SHADER=0x0,
GPU_GEOMETRY_SHADER=0x1
}GPU_SHADER_TYPE;

47
libctru/include/3ds/gpu/gpu-old.h Normal file
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@ -0,0 +1,47 @@
#pragma once
#include "gpu.h"
//GPU
void GPU_Init(Handle *gsphandle) DEPRECATED;
void GPU_Reset(u32* gxbuf, u32* gpuBuf, u32 gpuBufSize) DEPRECATED;
void GPU_SetFloatUniform(GPU_SHADER_TYPE type, u32 startreg, u32* data, u32 numreg) DEPRECATED;
void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u32 h) DEPRECATED;
void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h) DEPRECATED;
void GPU_DepthMap(float zScale, float zOffset) DEPRECATED;
void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref) DEPRECATED;
void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask) DEPRECATED; // GPU_WRITEMASK values can be ORed together
void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask) DEPRECATED;
void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass) DEPRECATED;
void GPU_SetFaceCulling(GPU_CULLMODE mode) DEPRECATED;
// Only the first four tev stages can write to the combiner buffer, use GPU_TEV_BUFFER_WRITE_CONFIG to build the parameters
void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config) DEPRECATED;
// these two can't be used together
void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alphaEquation,
GPU_BLENDFACTOR colorSrc, GPU_BLENDFACTOR colorDst,
GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst) DEPRECATED;
void GPU_SetColorLogicOp(GPU_LOGICOP op) DEPRECATED;
void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a) DEPRECATED;
void GPU_SetAttributeBuffers(u8 totalAttributes, u32* baseAddress, u64 attributeFormats, u16 attributeMask, u64 attributePermutation, u8 numBuffers, u32 bufferOffsets[], u64 bufferPermutations[], u8 bufferNumAttributes[]) DEPRECATED;
void GPU_SetTextureEnable(GPU_TEXUNIT units) DEPRECATED; // GPU_TEXUNITx values can be ORed together to enable multiple texture units
void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType) DEPRECATED;
/**
* @param borderColor The color used for the border when using the @ref GPU_CLAMP_TO_BORDER wrap mode
*/
void GPU_SetTextureBorderColor(GPU_TEXUNIT unit,u32 borderColor) DEPRECATED;
void GPU_SetTexEnv(u8 id, u16 rgbSources, u16 alphaSources, u16 rgbOperands, u16 alphaOperands, GPU_COMBINEFUNC rgbCombine, GPU_COMBINEFUNC alphaCombine, u32 constantColor) DEPRECATED;
void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count) DEPRECATED;
void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n) DEPRECATED;
void GPU_FinishDrawing() DEPRECATED;

289
libctru/include/3ds/gpu/gpu.h
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@ -1,14 +1,15 @@
#pragma once
#include "3ds/gpu/registers.h"
//GPU
void GPU_Init(Handle *gsphandle);
void GPU_Reset(u32* gxbuf, u32* gpuBuf, u32 gpuBufSize);
#include "registers.h"
#include "enums.h"
//GPUCMD
#define GPUCMD_HEADER(incremental, mask, reg) (((incremental)<<31)|(((mask)&0xF)<<16)|((reg)&0x3FF))
extern u32* gpuCmdBuf;
extern u32 gpuCmdBufSize;
extern u32 gpuCmdBufOffset;
void GPUCMD_SetBuffer(u32* adr, u32 size, u32 offset);
void GPUCMD_SetBufferOffset(u32 offset);
void GPUCMD_GetBuffer(u32** adr, u32* size, u32* offset);
@ -18,6 +19,9 @@ void GPUCMD_FlushAndRun(u32* gxbuf);
void GPUCMD_Add(u32 header, u32* param, u32 paramlength);
void GPUCMD_Finalize();
u32 f32tof24(float f);
u32 computeInvValue(u32 val);
#define GPUCMD_AddSingleParam(header, param) GPUCMD_Add((header), (u32[]){(u32)(param)}, 1)
#define GPUCMD_AddMaskedWrite(reg, mask, val) GPUCMD_AddSingleParam(GPUCMD_HEADER(0, (mask), (reg)), (val))
@ -26,278 +30,3 @@ void GPUCMD_Finalize();
#define GPUCMD_AddWrites(reg, vals, num) GPUCMD_AddMaskedWrites((reg), 0xF, (vals), (num))
#define GPUCMD_AddMaskedIncrementalWrites(reg, mask, vals, num) GPUCMD_Add(GPUCMD_HEADER(1, (mask), (reg)), (vals), (num))
#define GPUCMD_AddIncrementalWrites(reg, vals, num) GPUCMD_AddMaskedIncrementalWrites((reg), 0xF, (vals), (num))
//tex param
#define GPU_TEXTURE_MAG_FILTER(v) (((v)&0x1)<<1) //takes a GPU_TEXTURE_FILTER_PARAM
#define GPU_TEXTURE_MIN_FILTER(v) (((v)&0x1)<<2) //takes a GPU_TEXTURE_FILTER_PARAM
#define GPU_TEXTURE_WRAP_S(v) (((v)&0x3)<<12) //takes a GPU_TEXTURE_WRAP_PARAM
#define GPU_TEXTURE_WRAP_T(v) (((v)&0x3)<<8) //takes a GPU_TEXTURE_WRAP_PARAM
// Combiner buffer write config
#define GPU_TEV_BUFFER_WRITE_CONFIG(stage0, stage1, stage2, stage3) (stage0 | (stage1 << 1) | (stage2 << 2) | (stage3 << 3))
typedef enum
{
GPU_NEAREST = 0x0,
GPU_LINEAR = 0x1,
}GPU_TEXTURE_FILTER_PARAM;
typedef enum
{
GPU_CLAMP_TO_EDGE = 0x0,
GPU_CLAMP_TO_BORDER = 0x1,
GPU_REPEAT = 0x2,
GPU_MIRRORED_REPEAT = 0x3,
}GPU_TEXTURE_WRAP_PARAM;
typedef enum
{
GPU_TEXUNIT0 = 0x1,
GPU_TEXUNIT1 = 0x2,
GPU_TEXUNIT2 = 0x4
} GPU_TEXUNIT;
typedef enum{
GPU_RGBA8=0x0,
GPU_RGB8=0x1,
GPU_RGBA5551=0x2,
GPU_RGB565=0x3,
GPU_RGBA4=0x4,
GPU_LA8=0x5,
GPU_HILO8=0x6,
GPU_L8=0x7,
GPU_A8=0x8,
GPU_LA4=0x9,
GPU_L4=0xA,
GPU_ETC1=0xB,
GPU_ETC1A4=0xC
}GPU_TEXCOLOR;
typedef enum
{
GPU_NEVER = 0,
GPU_ALWAYS = 1,
GPU_EQUAL = 2,
GPU_NOTEQUAL = 3,
GPU_LESS = 4,
GPU_LEQUAL = 5,
GPU_GREATER = 6,
GPU_GEQUAL = 7
}GPU_TESTFUNC;
typedef enum
{
GPU_SCISSOR_DISABLE = 0, // disable scissor test
GPU_SCISSOR_INVERT = 1, // exclude pixels inside the scissor box
// 2 is the same as 0
GPU_SCISSOR_NORMAL = 3, // exclude pixels outside of the scissor box
} GPU_SCISSORMODE;
typedef enum
{
GPU_STENCIL_KEEP = 0, // old_stencil
GPU_STENCIL_ZERO = 1, // 0
GPU_STENCIL_REPLACE = 2, // ref
GPU_STENCIL_INCR = 3, // old_stencil + 1 saturated to [0, 255]
GPU_STENCIL_DECR = 4, // old_stencil - 1 saturated to [0, 255]
GPU_STENCIL_INVERT = 5, // ~old_stencil
GPU_STENCIL_INCR_WRAP = 6, // old_stencil + 1
GPU_STENCIL_DECR_WRAP = 7 // old_stencil - 1
} GPU_STENCILOP;
typedef enum
{
GPU_WRITE_RED = 0x01,
GPU_WRITE_GREEN = 0x02,
GPU_WRITE_BLUE = 0x04,
GPU_WRITE_ALPHA = 0x08,
GPU_WRITE_DEPTH = 0x10,
GPU_WRITE_COLOR = 0x0F,
GPU_WRITE_ALL = 0x1F
} GPU_WRITEMASK;
typedef enum
{
GPU_BLEND_ADD = 0,
GPU_BLEND_SUBTRACT = 1,
GPU_BLEND_REVERSE_SUBTRACT = 2,
GPU_BLEND_MIN = 3,
GPU_BLEND_MAX = 4
} GPU_BLENDEQUATION;
typedef enum
{
GPU_ZERO = 0,
GPU_ONE = 1,
GPU_SRC_COLOR = 2,
GPU_ONE_MINUS_SRC_COLOR = 3,
GPU_DST_COLOR = 4,
GPU_ONE_MINUS_DST_COLOR = 5,
GPU_SRC_ALPHA = 6,
GPU_ONE_MINUS_SRC_ALPHA = 7,
GPU_DST_ALPHA = 8,
GPU_ONE_MINUS_DST_ALPHA = 9,
GPU_CONSTANT_COLOR = 10,
GPU_ONE_MINUS_CONSTANT_COLOR = 11,
GPU_CONSTANT_ALPHA = 12,
GPU_ONE_MINUS_CONSTANT_ALPHA = 13,
GPU_SRC_ALPHA_SATURATE = 14
} GPU_BLENDFACTOR;
typedef enum
{
GPU_LOGICOP_CLEAR = 0,
GPU_LOGICOP_AND = 1,
GPU_LOGICOP_AND_REVERSE = 2,
GPU_LOGICOP_COPY = 3,
GPU_LOGICOP_SET = 4,
GPU_LOGICOP_COPY_INVERTED = 5,
GPU_LOGICOP_NOOP = 6,
GPU_LOGICOP_INVERT = 7,
GPU_LOGICOP_NAND = 8,
GPU_LOGICOP_OR = 9,
GPU_LOGICOP_NOR = 10,
GPU_LOGICOP_XOR = 11,
GPU_LOGICOP_EQUIV = 12,
GPU_LOGICOP_AND_INVERTED = 13,
GPU_LOGICOP_OR_REVERSE = 14,
GPU_LOGICOP_OR_INVERTED = 15
} GPU_LOGICOP;
typedef enum{
GPU_BYTE = 0,
GPU_UNSIGNED_BYTE = 1,
GPU_SHORT = 2,
GPU_FLOAT = 3
}GPU_FORMATS;
//defines for CW ?
typedef enum{
GPU_CULL_NONE = 0,
GPU_CULL_FRONT_CCW = 1,
GPU_CULL_BACK_CCW = 2
}GPU_CULLMODE;
#define GPU_ATTRIBFMT(i, n, f) (((((n)-1)<<2)|((f)&3))<<((i)*4))
/**
* Texture combiners sources
*/
typedef enum{
GPU_PRIMARY_COLOR = 0x00,
GPU_TEXTURE0 = 0x03,
GPU_TEXTURE1 = 0x04,
GPU_TEXTURE2 = 0x05,
GPU_TEXTURE3 = 0x06,
GPU_PREVIOUS_BUFFER = 0x0D,
GPU_CONSTANT = 0x0E,
GPU_PREVIOUS = 0x0F,
}GPU_TEVSRC;
/**
* Texture RGB combiners operands
*/
typedef enum{
GPU_TEVOP_RGB_SRC_COLOR = 0x00,
GPU_TEVOP_RGB_ONE_MINUS_SRC_COLOR = 0x01,
GPU_TEVOP_RGB_SRC_ALPHA = 0x02,
GPU_TEVOP_RGB_ONE_MINUS_SRC_ALPHA = 0x03,
GPU_TEVOP_RGB_SRC0_RGB = 0x04,
GPU_TEVOP_RGB_0x05 = 0x05,
GPU_TEVOP_RGB_0x06 = 0x06,
GPU_TEVOP_RGB_0x07 = 0x07,
GPU_TEVOP_RGB_SRC1_RGB = 0x08,
GPU_TEVOP_RGB_0x09 = 0x09,
GPU_TEVOP_RGB_0x0A = 0x0A,
GPU_TEVOP_RGB_0x0B = 0x0B,
GPU_TEVOP_RGB_SRC2_RGB = 0x0C,
GPU_TEVOP_RGB_0x0D = 0x0D,
GPU_TEVOP_RGB_0x0E = 0x0E,
GPU_TEVOP_RGB_0x0F = 0x0F,
}GPU_TEVOP_RGB;
/**
* Texture ALPHA combiners operands
*/
typedef enum{
GPU_TEVOP_A_SRC_ALPHA = 0x00,
GPU_TEVOP_A_ONE_MINUS_SRC_ALPHA = 0x01,
GPU_TEVOP_A_SRC0_RGB = 0x02,
GPU_TEVOP_A_SRC1_RGB = 0x04,
GPU_TEVOP_A_SRC2_RGB = 0x06,
}GPU_TEVOP_A;
/**
* Texture combiner functions
*/
typedef enum{
GPU_REPLACE = 0x00,
GPU_MODULATE = 0x01,
GPU_ADD = 0x02,
GPU_ADD_SIGNED = 0x03,
GPU_INTERPOLATE = 0x04,
GPU_SUBTRACT = 0x05,
GPU_DOT3_RGB = 0x06 //RGB only
}GPU_COMBINEFUNC;
#define GPU_TEVSOURCES(a,b,c) (((a))|((b)<<4)|((c)<<8))
#define GPU_TEVOPERANDS(a,b,c) (((a))|((b)<<4)|((c)<<8))
typedef enum{
GPU_TRIANGLES = 0x0000,
GPU_TRIANGLE_STRIP = 0x0100,
GPU_TRIANGLE_FAN = 0x0200,
GPU_UNKPRIM = 0x0300 // ?
}GPU_Primitive_t;
typedef enum{
GPU_VERTEX_SHADER=0x0,
GPU_GEOMETRY_SHADER=0x1
}GPU_SHADER_TYPE;
void GPU_SetFloatUniform(GPU_SHADER_TYPE type, u32 startreg, u32* data, u32 numreg);
void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u32 h);
void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h);
void GPU_DepthMap(float zScale, float zOffset);
void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref);
void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask); // GPU_WRITEMASK values can be ORed together
void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask);
void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass);
void GPU_SetFaceCulling(GPU_CULLMODE mode);
// Only the first four tev stages can write to the combiner buffer, use GPU_TEV_BUFFER_WRITE_CONFIG to build the parameters
void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config);
// these two can't be used together
void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alphaEquation,
GPU_BLENDFACTOR colorSrc, GPU_BLENDFACTOR colorDst,
GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst);
void GPU_SetColorLogicOp(GPU_LOGICOP op);
void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a);
void GPU_SetAttributeBuffers(u8 totalAttributes, u32* baseAddress, u64 attributeFormats, u16 attributeMask, u64 attributePermutation, u8 numBuffers, u32 bufferOffsets[], u64 bufferPermutations[], u8 bufferNumAttributes[]);
void GPU_SetTextureEnable(GPU_TEXUNIT units); // GPU_TEXUNITx values can be ORed together to enable multiple texture units
void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType);
/**
* @param borderColor The color used for the border when using the @ref GPU_CLAMP_TO_BORDER wrap mode
*/
void GPU_SetTextureBorderColor(GPU_TEXUNIT unit,u32 borderColor);
void GPU_SetTexEnv(u8 id, u16 rgbSources, u16 alphaSources, u16 rgbOperands, u16 alphaOperands, GPU_COMBINEFUNC rgbCombine, GPU_COMBINEFUNC alphaCombine, u32 constantColor);
void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count);
void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n);
void GPU_FinishDrawing();
void GPU_SetShaderOutmap(u32 outmapData[8]);
void GPU_SendShaderCode(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length);
void GPU_SendOperandDescriptors(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length);

4
libctru/include/3ds/gpu/shaderProgram.h
View File

@ -38,3 +38,7 @@ Result shaderProgramFree(shaderProgram_s* sp);
Result shaderProgramSetVsh(shaderProgram_s* sp, DVLE_s* dvle);
Result shaderProgramSetGsh(shaderProgram_s* sp, DVLE_s* dvle, u8 stride);
Result shaderProgramUse(shaderProgram_s* sp);
void GPU_SetShaderOutmap(u32 outmapData[8]);
void GPU_SendShaderCode(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length);
void GPU_SendOperandDescriptors(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length);

12
libctru/include/3ds/types.h
View File

@ -44,7 +44,13 @@ typedef void (*ThreadFunc)(void *);
#define BIT(n) (1U<<(n))
//! aligns a struct (and other types?) to m, making sure that the size of the struct is a multiple of m.
#define ALIGN(m) __attribute__((aligned (m)))
#define ALIGN(m) __attribute__((aligned(m)))
//! packs a struct (and other types?) so it won't include padding bytes.
#define PACKED __attribute__ ((packed))
#define PACKED __attribute__((packed))
//! flags a function as deprecated.
#ifndef LIBCTRU_NO_DEPRECATION
#define DEPRECATED __attribute__ ((deprecated))
#else
#define DEPRECATED
#endif

425
libctru/source/gpu/gpu-old.c Normal file
View File

@ -0,0 +1,425 @@
/*
gpu-old.c _ Legacy GPU commands.
*/
#define LIBCTRU_NO_DEPRECATION
#include <stdlib.h>
#include <string.h>
#include <3ds/types.h>
#include <3ds/gpu/gpu.h>
#include <3ds/gpu/gpu-old.h>
#include <3ds/gpu/gx.h>
#include <3ds/gpu/shbin.h>
void GPU_Init(Handle *gsphandle)
{
gpuCmdBuf=NULL;
gpuCmdBufSize=0;
gpuCmdBufOffset=0;
}
extern u32 gpuResetSequence[];
extern u32 gpuResetSequenceLength;
void GPU_Reset(u32* gxbuf, u32* gpuBuf, u32 gpuBufSize)
{
int i;
static u32 param[0x80];
static u32 zero[0x80];
memset(zero, 0x00, 0x80*4);
GPUCMD_SetBuffer(gpuBuf, gpuBufSize, 0);
GPUCMD_AddMaskedWrite(GPUREG_TEXUNITS_CONFIG, 0xD, 0x00011000);
for(i=0x1;i<0xC;i++)GPUCMD_AddWrite(GPUREG_TEXUNITS_CONFIG+i, 0x00000000);
GPUCMD_AddWrite(GPUREG_008C, 0x00FF0000);
GPUCMD_AddWrite(GPUREG_008D, 0x00000000);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_TYPE, 0x00000000);
for(i=0x0;i<0xF;i++)GPUCMD_AddWrite(GPUREG_0090+i, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0244, 0x1, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_GSH_INPUTBUFFER_CONFIG, 0x8, 0x80000000);
GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0xB, 0x00000000);
GPUCMD_AddWrite(GPUREG_0252, 0x00000000);
GPUCMD_AddWrite(GPUREG_0251, 0x00000000);
GPUCMD_AddWrite(GPUREG_0254, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_0242, 0x00000000);
GPUCMD_AddWrite(GPUREG_024A, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x5, 0x00000000);
GPUCMD_AddIncrementalWrites(GPUREG_BLEND_CONFIG, zero, 0x00000007);
GPUCMD_AddWrite(GPUREG_011F, 0x00010140);
GPUCMD_AddWrite(GPUREG_COLOROUTPUT_CONFIG, 0x00E40100);
GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, 0x01010000);
GPUCMD_AddWrite(GPUREG_DEPTHTEST_CONFIG, 0x00001F40);
GPUCMD_AddWrite(GPUREG_STENCILTEST_CONFIG, 0xFF00FF10);
GPUCMD_AddMaskedWrite(GPUREG_0061, 0x1, 0x00000003);
GPUCMD_AddMaskedWrite(GPUREG_0062, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_SCISSORTEST_MODE, 0x00000000);
GPUCMD_AddWrite(GPUREG_SCISSORTEST_POS, 0x00000000);
GPUCMD_AddWrite(GPUREG_SCISSORTEST_DIM, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0118, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_011B, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_006A, 0x7, 0x00FFFFFF);
GPUCMD_AddWrite(GPUREG_COLORLOGICOP_CONFIG, 0x00000003);
GPUCMD_AddMaskedWrite(GPUREG_0126, 0x8, 0x03000000);
GPUCMD_AddIncrementalWrites(GPUREG_FACECULLING_CONFIG, zero, 0x00000010);
param[0x0]=0x1F1F1F1F;
param[0x1]=0x1F1F1F1F;
param[0x2]=0x1F1F1F1F;
param[0x3]=0x1F1F1F1F;
param[0x4]=0x1F1F1F1F;
param[0x5]=0x1F1F1F1F;
param[0x6]=0x1F1F1F1F;
GPUCMD_AddIncrementalWrites(GPUREG_SH_OUTMAP_O0, param, 0x00000007);
GPUCMD_AddWrite(GPUREG_0058, 0x00000100);
GPUCMD_AddWrite(GPUREG_004C, 0x00000001);
GPUCMD_AddWrite(GPUREG_006F, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0060, 0x2, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0069, 0xC, 0x00020000);
GPUCMD_AddWrite(GPUREG_0113, 0x0000000F);
GPUCMD_AddWrite(GPUREG_0112, 0x0000000F);
GPUCMD_AddWrite(GPUREG_0114, 0x00000003);
GPUCMD_AddWrite(GPUREG_0115, 0x00000003);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000000);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000100);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000200);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000300);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000400);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000500);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000600);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_GSH_FLOATUNIFORM_CONFIG, 0x80000000);
for(i=0;i<48;i++)GPUCMD_AddIncrementalWrites(GPUREG_GSH_FLOATUNIFORM_DATA, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_CONFIG, 0x00000000);
for(i=0;i<4;i++)GPUCMD_Add(0x000F02CC, zero, 0x00000080);
GPUCMD_AddWrite(GPUREG_GSH_CODETRANSFER_CONFIG, 0x00000200);
for(i=0;i<28;i++)GPUCMD_Add(0x000F029C, zero, 0x00000080);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_END, 0x00000000);
GPUCMD_AddIncrementalWrites(GPUREG_VSH_INTUNIFORM_I0, zero, 4);
param[0x0]=0xFFFFFFFF;
param[0x1]=0xFFFFFFFF;
GPUCMD_AddIncrementalWrites(GPUREG_GSH_ATTRIBUTES_PERMUTATION_LOW, param, 0x00000002);
GPUCMD_AddIncrementalWrites(GPUREG_ATTRIBBUFFER0_CONFIG2, zero, 0x00000024);
for(i=0;i<gpuResetSequenceLength;i++)GPUCMD_AddSingleParam(gpuResetSequence[i*2],gpuResetSequence[i*2+1]);
GPUCMD_Finalize();
GPUCMD_Run(gpuBuf);
GPUCMD_SetBufferOffset(0);
}
void GPU_SetFloatUniform(GPU_SHADER_TYPE type, u32 startreg, u32* data, u32 numreg)
{
if(!data)return;
int regOffset=(type==GPU_GEOMETRY_SHADER)?(-0x30):(0x0);
GPUCMD_AddWrite(GPUREG_VSH_FLOATUNIFORM_CONFIG+regOffset, 0x80000000|startreg);
GPUCMD_AddWrites(GPUREG_VSH_FLOATUNIFORM_DATA+regOffset, data, numreg*4);
}
//takes PAs as arguments
void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u32 h)
{
u32 param[0x4];
float fw=(float)w;
float fh=(float)h;
GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
u32 f116e=0x01000000|(((h-1)&0xFFF)<<12)|(w&0xFFF);
param[0x0]=((u32)depthBuffer)>>3;
param[0x1]=((u32)colorBuffer)>>3;
param[0x2]=f116e;
GPUCMD_AddIncrementalWrites(GPUREG_DEPTHBUFFER_LOC, param, 0x00000003);
GPUCMD_AddWrite(GPUREG_006E, f116e);
GPUCMD_AddWrite(GPUREG_DEPTHBUFFER_FORMAT, 0x00000003); //depth buffer format
GPUCMD_AddWrite(GPUREG_COLORBUFFER_FORMAT, 0x00000002); //color buffer format
GPUCMD_AddWrite(GPUREG_011B, 0x00000000); //?
param[0x0]=f32tof24(fw/2);
param[0x1]=computeInvValue(fw);
param[0x2]=f32tof24(fh/2);
param[0x3]=computeInvValue(fh);
GPUCMD_AddIncrementalWrites(GPUREG_0041, param, 0x00000004);
GPUCMD_AddWrite(GPUREG_0068, (y<<16)|(x&0xFFFF));
param[0x0]=0x00000000;
param[0x1]=0x00000000;
param[0x2]=((h-1)<<16)|((w-1)&0xFFFF);
GPUCMD_AddIncrementalWrites(GPUREG_SCISSORTEST_MODE, param, 0x00000003);
//enable depth buffer
param[0x0]=0x0000000F;
param[0x1]=0x0000000F;
param[0x2]=0x00000002;
param[0x3]=0x00000002;
GPUCMD_AddIncrementalWrites(GPUREG_0112, param, 0x00000004);
}
void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h)
{
u32 param[3];
param[0x0] = mode;
param[0x1] = (y<<16)|(x&0xFFFF);
param[0x2] = ((h-1)<<16)|((w-1)&0xFFFF);
GPUCMD_AddIncrementalWrites(GPUREG_SCISSORTEST_MODE, param, 0x00000003);
}
void GPU_DepthMap(float zScale, float zOffset)
{
GPUCMD_AddWrite(GPUREG_006D, 0x00000001); //?
GPUCMD_AddWrite(GPUREG_DEPTHMAP_SCALE, f32tof24(zScale));
GPUCMD_AddWrite(GPUREG_DEPTHMAP_OFFSET, f32tof24(zOffset));
}
void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref)
{
GPUCMD_AddWrite(GPUREG_ALPHATEST_CONFIG, (enable&1)|((function&7)<<4)|(ref<<8));
}
void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask)
{
GPUCMD_AddWrite(GPUREG_STENCILTEST_CONFIG, (enable&1)|((function&7)<<4)|(write_mask<<8)|(ref<<16)|(input_mask<<24));
}
void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass)
{
GPUCMD_AddWrite(GPUREG_STENCILOP_CONFIG, sfail | (dfail << 4) | (pass << 8));
}
void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask)
{
GPUCMD_AddWrite(GPUREG_DEPTHTEST_CONFIG, (enable&1)|((function&7)<<4)|(writemask<<8));
}
void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alphaEquation,
GPU_BLENDFACTOR colorSrc, GPU_BLENDFACTOR colorDst,
GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst)
{
GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, colorEquation | (alphaEquation<<8) | (colorSrc<<16) | (colorDst<<20) | (alphaSrc<<24) | (alphaDst<<28));
GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000100);
}
void GPU_SetColorLogicOp(GPU_LOGICOP op)
{
GPUCMD_AddWrite(GPUREG_COLORLOGICOP_CONFIG, op);
GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000000);
}
void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a)
{
GPUCMD_AddWrite(GPUREG_BLEND_COLOR, r | (g << 8) | (b << 16) | (a << 24));
}
void GPU_SetTextureEnable(GPU_TEXUNIT units)
{
GPUCMD_AddMaskedWrite(GPUREG_006F, 0x2, units<<8); // enables texcoord outputs
GPUCMD_AddWrite(GPUREG_TEXUNITS_CONFIG, 0x00011000|units); // enables texture units
}
void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType)
{
switch (unit)
{
case GPU_TEXUNIT0:
GPUCMD_AddWrite(GPUREG_TEXUNIT0_TYPE, colorType);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_LOC, ((u32)data)>>3);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_DIM, (width<<16)|height);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_PARAM, param);
break;
case GPU_TEXUNIT1:
GPUCMD_AddWrite(GPUREG_TEXUNIT1_TYPE, colorType);
GPUCMD_AddWrite(GPUREG_TEXUNIT1_LOC, ((u32)data)>>3);
GPUCMD_AddWrite(GPUREG_TEXUNIT1_DIM, (width<<16)|height);
GPUCMD_AddWrite(GPUREG_TEXUNIT1_PARAM, param);
break;
case GPU_TEXUNIT2:
GPUCMD_AddWrite(GPUREG_TEXUNIT2_TYPE, colorType);
GPUCMD_AddWrite(GPUREG_TEXUNIT2_LOC, ((u32)data)>>3);
GPUCMD_AddWrite(GPUREG_TEXUNIT2_DIM, (width<<16)|height);
GPUCMD_AddWrite(GPUREG_TEXUNIT2_PARAM, param);
break;
}
}
void GPU_SetTextureBorderColor(GPU_TEXUNIT unit,u32 borderColor)
{
switch (unit)
{
case GPU_TEXUNIT0:
GPUCMD_AddWrite(GPUREG_TEXUNIT0_BORDER_COLOR, borderColor);
break;
case GPU_TEXUNIT1:
GPUCMD_AddWrite(GPUREG_TEXUNIT1_BORDER_COLOR, borderColor);
break;
case GPU_TEXUNIT2:
GPUCMD_AddWrite(GPUREG_TEXUNIT2_BORDER_COLOR, borderColor);
break;
}
}
const u8 GPU_FORMATSIZE[4]={1,1,2,4};
void GPU_SetAttributeBuffers(u8 totalAttributes, u32* baseAddress, u64 attributeFormats, u16 attributeMask, u64 attributePermutation, u8 numBuffers, u32 bufferOffsets[], u64 bufferPermutations[], u8 bufferNumAttributes[])
{
u32 param[0x28];
memset(param, 0x00, 0x28*4);
param[0x0]=((u32)baseAddress)>>3;
param[0x1]=attributeFormats&0xFFFFFFFF;
param[0x2]=((totalAttributes-1)<<28)|((attributeMask&0xFFF)<<16)|((attributeFormats>>32)&0xFFFF);
int i, j;
u8 sizeTable[0xC];
for(i=0;i<totalAttributes;i++)
{
u8 v=attributeFormats&0xF;
sizeTable[i]=GPU_FORMATSIZE[v&3]*((v>>2)+1);
attributeFormats>>=4;
}
for(i=0;i<numBuffers;i++)
{
u16 stride=0;
param[3*(i+1)+0]=bufferOffsets[i];
param[3*(i+1)+1]=bufferPermutations[i]&0xFFFFFFFF;
for(j=0;j<bufferNumAttributes[i];j++)stride+=sizeTable[(bufferPermutations[i]>>(4*j))&0xF];
param[3*(i+1)+2]=(bufferNumAttributes[i]<<28)|((stride&0xFFF)<<16)|((bufferPermutations[i]>>32)&0xFFFF);
}
GPUCMD_AddIncrementalWrites(GPUREG_ATTRIBBUFFERS_LOC, param, 0x00000027);
GPUCMD_AddMaskedWrite(GPUREG_VSH_INPUTBUFFER_CONFIG, 0xB, 0xA0000000|(totalAttributes-1));
GPUCMD_AddWrite(GPUREG_0242, (totalAttributes-1));
GPUCMD_AddIncrementalWrites(GPUREG_VSH_ATTRIBUTES_PERMUTATION_LOW, ((u32[]){attributePermutation&0xFFFFFFFF, (attributePermutation>>32)&0xFFFF}), 2);
}
void GPU_SetAttributeBuffersAddress(u32* baseAddress)
{
GPUCMD_AddWrite(GPUREG_ATTRIBBUFFERS_LOC, ((u32)baseAddress)>>3);
}
void GPU_SetFaceCulling(GPU_CULLMODE mode)
{
GPUCMD_AddWrite(GPUREG_FACECULLING_CONFIG, mode&0x3);
}
void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config)
{
GPUCMD_AddMaskedWrite(GPUREG_TEXENV_BUFFER_CONFIG, 0x2, (rgb_config << 8) | (alpha_config << 12));
}
const u8 GPU_TEVID[]={0xC0,0xC8,0xD0,0xD8,0xF0,0xF8};
void GPU_SetTexEnv(u8 id, u16 rgbSources, u16 alphaSources, u16 rgbOperands, u16 alphaOperands, GPU_COMBINEFUNC rgbCombine, GPU_COMBINEFUNC alphaCombine, u32 constantColor)
{
if(id>6)return;
u32 param[0x5];
memset(param, 0x00, 5*4);
param[0x0]=(alphaSources<<16)|(rgbSources);
param[0x1]=(alphaOperands<<12)|(rgbOperands);
param[0x2]=(alphaCombine<<16)|(rgbCombine);
param[0x3]=constantColor;
param[0x4]=0x00000000; // ?
GPUCMD_AddIncrementalWrites(GPUREG_0000|GPU_TEVID[id], param, 0x00000005);
}
void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count)
{
//set primitive type
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001);
//index buffer address register should be cleared (except bit 31) before drawing
GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000);
//pass number of vertices
GPUCMD_AddWrite(GPUREG_NUMVERTICES, count);
//set first vertex
GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, first);
//all the following except 0x000F022E might be useless
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_DRAWARRAYS, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
}
void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n)
{
//set primitive type
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001);
//index buffer (TODO : support multiple types)
GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000|((u32)indexArray));
//pass number of vertices
GPUCMD_AddWrite(GPUREG_NUMVERTICES, n);
GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0x2, 0x00000100);
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x2, 0x00000100);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_DRAWELEMENTS, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
// CHECKME: does this one also require command 0x0111 at the end?
}
void GPU_FinishDrawing()
{
GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
GPUCMD_AddWrite(GPUREG_0063, 0x00000001);
}

441
libctru/source/gpu/gpu.c
View File

@ -13,13 +13,6 @@ u32* gpuCmdBuf;
u32 gpuCmdBufSize;
u32 gpuCmdBufOffset;
void GPU_Init(Handle *gsphandle)
{
gpuCmdBuf=NULL;
gpuCmdBufSize=0;
gpuCmdBufOffset=0;
}
void GPUCMD_SetBuffer(u32* adr, u32 size, u32 offset)
{
gpuCmdBuf=adr;
@ -97,138 +90,6 @@ void GPUCMD_Finalize()
GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678); //not the cleanest way of guaranteeing 0x10-byte size but whatever good enough for now
}
extern u32 gpuResetSequence[];
extern u32 gpuResetSequenceLength;
void GPU_Reset(u32* gxbuf, u32* gpuBuf, u32 gpuBufSize)
{
int i;
static u32 param[0x80];
static u32 zero[0x80];
memset(zero, 0x00, 0x80*4);
GPUCMD_SetBuffer(gpuBuf, gpuBufSize, 0);
GPUCMD_AddMaskedWrite(GPUREG_TEXUNITS_CONFIG, 0xD, 0x00011000);
for(i=0x1;i<0xC;i++)GPUCMD_AddWrite(GPUREG_TEXUNITS_CONFIG+i, 0x00000000);
GPUCMD_AddWrite(GPUREG_008C, 0x00FF0000);
GPUCMD_AddWrite(GPUREG_008D, 0x00000000);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_TYPE, 0x00000000);
for(i=0x0;i<0xF;i++)GPUCMD_AddWrite(GPUREG_0090+i, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0244, 0x1, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_GSH_INPUTBUFFER_CONFIG, 0x8, 0x80000000);
GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0xB, 0x00000000);
GPUCMD_AddWrite(GPUREG_0252, 0x00000000);
GPUCMD_AddWrite(GPUREG_0251, 0x00000000);
GPUCMD_AddWrite(GPUREG_0254, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_0242, 0x00000000);
GPUCMD_AddWrite(GPUREG_024A, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x5, 0x00000000);
GPUCMD_AddIncrementalWrites(GPUREG_BLEND_CONFIG, zero, 0x00000007);
GPUCMD_AddWrite(GPUREG_011F, 0x00010140);
GPUCMD_AddWrite(GPUREG_COLOROUTPUT_CONFIG, 0x00E40100);
GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, 0x01010000);
GPUCMD_AddWrite(GPUREG_DEPTHTEST_CONFIG, 0x00001F40);
GPUCMD_AddWrite(GPUREG_STENCILTEST_CONFIG, 0xFF00FF10);
GPUCMD_AddMaskedWrite(GPUREG_0061, 0x1, 0x00000003);
GPUCMD_AddMaskedWrite(GPUREG_0062, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_SCISSORTEST_MODE, 0x00000000);
GPUCMD_AddWrite(GPUREG_SCISSORTEST_POS, 0x00000000);
GPUCMD_AddWrite(GPUREG_SCISSORTEST_DIM, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0118, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_011B, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_006A, 0x7, 0x00FFFFFF);
GPUCMD_AddWrite(GPUREG_COLORLOGICOP_CONFIG, 0x00000003);
GPUCMD_AddMaskedWrite(GPUREG_0126, 0x8, 0x03000000);
GPUCMD_AddIncrementalWrites(GPUREG_FACECULLING_CONFIG, zero, 0x00000010);
param[0x0]=0x1F1F1F1F;
param[0x1]=0x1F1F1F1F;
param[0x2]=0x1F1F1F1F;
param[0x3]=0x1F1F1F1F;
param[0x4]=0x1F1F1F1F;
param[0x5]=0x1F1F1F1F;
param[0x6]=0x1F1F1F1F;
GPUCMD_AddIncrementalWrites(GPUREG_SH_OUTMAP_O0, param, 0x00000007);
GPUCMD_AddWrite(GPUREG_0058, 0x00000100);
GPUCMD_AddWrite(GPUREG_004C, 0x00000001);
GPUCMD_AddWrite(GPUREG_006F, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0060, 0x2, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_0069, 0xC, 0x00020000);
GPUCMD_AddWrite(GPUREG_0113, 0x0000000F);
GPUCMD_AddWrite(GPUREG_0112, 0x0000000F);
GPUCMD_AddWrite(GPUREG_0114, 0x00000003);
GPUCMD_AddWrite(GPUREG_0115, 0x00000003);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000000);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000100);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000200);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000300);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000400);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000500);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_01C5, 0x00000600);
for(i=0;i<32;i++)GPUCMD_AddIncrementalWrites(GPUREG_01C8, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_GSH_FLOATUNIFORM_CONFIG, 0x80000000);
for(i=0;i<48;i++)GPUCMD_AddIncrementalWrites(GPUREG_GSH_FLOATUNIFORM_DATA, zero, 0x00000008);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_CONFIG, 0x00000000);
for(i=0;i<4;i++)GPUCMD_Add(0x000F02CC, zero, 0x00000080);
GPUCMD_AddWrite(GPUREG_GSH_CODETRANSFER_CONFIG, 0x00000200);
for(i=0;i<28;i++)GPUCMD_Add(0x000F029C, zero, 0x00000080);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_END, 0x00000000);
GPUCMD_AddIncrementalWrites(GPUREG_VSH_INTUNIFORM_I0, zero, 4);
param[0x0]=0xFFFFFFFF;
param[0x1]=0xFFFFFFFF;
GPUCMD_AddIncrementalWrites(GPUREG_GSH_ATTRIBUTES_PERMUTATION_LOW, param, 0x00000002);
GPUCMD_AddIncrementalWrites(GPUREG_ATTRIBBUFFER0_CONFIG2, zero, 0x00000024);
for(i=0;i<gpuResetSequenceLength;i++)GPUCMD_AddSingleParam(gpuResetSequence[i*2],gpuResetSequence[i*2+1]);
GPUCMD_Finalize();
GPUCMD_Run(gpuBuf);
GPUCMD_SetBufferOffset(0);
}
void GPU_SetFloatUniform(GPU_SHADER_TYPE type, u32 startreg, u32* data, u32 numreg)
{
if(!data)return;
int regOffset=(type==GPU_GEOMETRY_SHADER)?(-0x30):(0x0);
GPUCMD_AddWrite(GPUREG_VSH_FLOATUNIFORM_CONFIG+regOffset, 0x80000000|startreg);
GPUCMD_AddWrites(GPUREG_VSH_FLOATUNIFORM_DATA+regOffset, data, numreg*4);
}
//TODO : fix
u32 f32tof24(float f)
{
@ -264,305 +125,3 @@ u32 computeInvValue(u32 val)
tmp3>>=31;
return (tmp1|(tmp2<<23)|(tmp3<<30))<<1;
}
//takes PAs as arguments
void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u32 h)
{
u32 param[0x4];
float fw=(float)w;
float fh=(float)h;
GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
u32 f116e=0x01000000|(((h-1)&0xFFF)<<12)|(w&0xFFF);
param[0x0]=((u32)depthBuffer)>>3;
param[0x1]=((u32)colorBuffer)>>3;
param[0x2]=f116e;
GPUCMD_AddIncrementalWrites(GPUREG_DEPTHBUFFER_LOC, param, 0x00000003);
GPUCMD_AddWrite(GPUREG_006E, f116e);
GPUCMD_AddWrite(GPUREG_DEPTHBUFFER_FORMAT, 0x00000003); //depth buffer format
GPUCMD_AddWrite(GPUREG_COLORBUFFER_FORMAT, 0x00000002); //color buffer format
GPUCMD_AddWrite(GPUREG_011B, 0x00000000); //?
param[0x0]=f32tof24(fw/2);
param[0x1]=computeInvValue(fw);
param[0x2]=f32tof24(fh/2);
param[0x3]=computeInvValue(fh);
GPUCMD_AddIncrementalWrites(GPUREG_0041, param, 0x00000004);
GPUCMD_AddWrite(GPUREG_0068, (y<<16)|(x&0xFFFF));
param[0x0]=0x00000000;
param[0x1]=0x00000000;
param[0x2]=((h-1)<<16)|((w-1)&0xFFFF);
GPUCMD_AddIncrementalWrites(GPUREG_SCISSORTEST_MODE, param, 0x00000003);
//enable depth buffer
param[0x0]=0x0000000F;
param[0x1]=0x0000000F;
param[0x2]=0x00000002;
param[0x3]=0x00000002;
GPUCMD_AddIncrementalWrites(GPUREG_0112, param, 0x00000004);
}
void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h)
{
u32 param[3];
param[0x0] = mode;
param[0x1] = (y<<16)|(x&0xFFFF);
param[0x2] = ((h-1)<<16)|((w-1)&0xFFFF);
GPUCMD_AddIncrementalWrites(GPUREG_SCISSORTEST_MODE, param, 0x00000003);
}
void GPU_DepthMap(float zScale, float zOffset)
{
GPUCMD_AddWrite(GPUREG_006D, 0x00000001); //?
GPUCMD_AddWrite(GPUREG_DEPTHMAP_SCALE, f32tof24(zScale));
GPUCMD_AddWrite(GPUREG_DEPTHMAP_OFFSET, f32tof24(zOffset));
}
void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref)
{
GPUCMD_AddWrite(GPUREG_ALPHATEST_CONFIG, (enable&1)|((function&7)<<4)|(ref<<8));
}
void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask)
{
GPUCMD_AddWrite(GPUREG_STENCILTEST_CONFIG, (enable&1)|((function&7)<<4)|(write_mask<<8)|(ref<<16)|(input_mask<<24));
}
void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass)
{
GPUCMD_AddWrite(GPUREG_STENCILOP_CONFIG, sfail | (dfail << 4) | (pass << 8));
}
void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask)
{
GPUCMD_AddWrite(GPUREG_DEPTHTEST_CONFIG, (enable&1)|((function&7)<<4)|(writemask<<8));
}
void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alphaEquation,
GPU_BLENDFACTOR colorSrc, GPU_BLENDFACTOR colorDst,
GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst)
{
GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, colorEquation | (alphaEquation<<8) | (colorSrc<<16) | (colorDst<<20) | (alphaSrc<<24) | (alphaDst<<28));
GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000100);
}
void GPU_SetColorLogicOp(GPU_LOGICOP op)
{
GPUCMD_AddWrite(GPUREG_COLORLOGICOP_CONFIG, op);
GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000000);
}
void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a)
{
GPUCMD_AddWrite(GPUREG_BLEND_COLOR, r | (g << 8) | (b << 16) | (a << 24));
}
void GPU_SetTextureEnable(GPU_TEXUNIT units)
{
GPUCMD_AddMaskedWrite(GPUREG_006F, 0x2, units<<8); // enables texcoord outputs
GPUCMD_AddWrite(GPUREG_TEXUNITS_CONFIG, 0x00011000|units); // enables texture units
}
void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType)
{
switch (unit)
{
case GPU_TEXUNIT0:
GPUCMD_AddWrite(GPUREG_TEXUNIT0_TYPE, colorType);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_LOC, ((u32)data)>>3);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_DIM, (width<<16)|height);
GPUCMD_AddWrite(GPUREG_TEXUNIT0_PARAM, param);
break;
case GPU_TEXUNIT1:
GPUCMD_AddWrite(GPUREG_TEXUNIT1_TYPE, colorType);
GPUCMD_AddWrite(GPUREG_TEXUNIT1_LOC, ((u32)data)>>3);
GPUCMD_AddWrite(GPUREG_TEXUNIT1_DIM, (width<<16)|height);
GPUCMD_AddWrite(GPUREG_TEXUNIT1_PARAM, param);
break;
case GPU_TEXUNIT2:
GPUCMD_AddWrite(GPUREG_TEXUNIT2_TYPE, colorType);
GPUCMD_AddWrite(GPUREG_TEXUNIT2_LOC, ((u32)data)>>3);
GPUCMD_AddWrite(GPUREG_TEXUNIT2_DIM, (width<<16)|height);
GPUCMD_AddWrite(GPUREG_TEXUNIT2_PARAM, param);
break;
}
}
void GPU_SetTextureBorderColor(GPU_TEXUNIT unit,u32 borderColor)
{
switch (unit)
{
case GPU_TEXUNIT0:
GPUCMD_AddWrite(GPUREG_TEXUNIT0_BORDER_COLOR, borderColor);
break;
case GPU_TEXUNIT1:
GPUCMD_AddWrite(GPUREG_TEXUNIT1_BORDER_COLOR, borderColor);
break;
case GPU_TEXUNIT2:
GPUCMD_AddWrite(GPUREG_TEXUNIT2_BORDER_COLOR, borderColor);
break;
}
}
const u8 GPU_FORMATSIZE[4]={1,1,2,4};
void GPU_SetAttributeBuffers(u8 totalAttributes, u32* baseAddress, u64 attributeFormats, u16 attributeMask, u64 attributePermutation, u8 numBuffers, u32 bufferOffsets[], u64 bufferPermutations[], u8 bufferNumAttributes[])
{
u32 param[0x28];
memset(param, 0x00, 0x28*4);
param[0x0]=((u32)baseAddress)>>3;
param[0x1]=attributeFormats&0xFFFFFFFF;
param[0x2]=((totalAttributes-1)<<28)|((attributeMask&0xFFF)<<16)|((attributeFormats>>32)&0xFFFF);
int i, j;
u8 sizeTable[0xC];
for(i=0;i<totalAttributes;i++)
{
u8 v=attributeFormats&0xF;
sizeTable[i]=GPU_FORMATSIZE[v&3]*((v>>2)+1);
attributeFormats>>=4;
}
for(i=0;i<numBuffers;i++)
{
u16 stride=0;
param[3*(i+1)+0]=bufferOffsets[i];
param[3*(i+1)+1]=bufferPermutations[i]&0xFFFFFFFF;
for(j=0;j<bufferNumAttributes[i];j++)stride+=sizeTable[(bufferPermutations[i]>>(4*j))&0xF];
param[3*(i+1)+2]=(bufferNumAttributes[i]<<28)|((stride&0xFFF)<<16)|((bufferPermutations[i]>>32)&0xFFFF);
}
GPUCMD_AddIncrementalWrites(GPUREG_ATTRIBBUFFERS_LOC, param, 0x00000027);
GPUCMD_AddMaskedWrite(GPUREG_VSH_INPUTBUFFER_CONFIG, 0xB, 0xA0000000|(totalAttributes-1));
GPUCMD_AddWrite(GPUREG_0242, (totalAttributes-1));
GPUCMD_AddIncrementalWrites(GPUREG_VSH_ATTRIBUTES_PERMUTATION_LOW, ((u32[]){attributePermutation&0xFFFFFFFF, (attributePermutation>>32)&0xFFFF}), 2);
}
void GPU_SetAttributeBuffersAddress(u32* baseAddress)
{
GPUCMD_AddWrite(GPUREG_ATTRIBBUFFERS_LOC, ((u32)baseAddress)>>3);
}
void GPU_SetFaceCulling(GPU_CULLMODE mode)
{
GPUCMD_AddWrite(GPUREG_FACECULLING_CONFIG, mode&0x3);
}
void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config)
{
GPUCMD_AddMaskedWrite(GPUREG_TEXENV_BUFFER_CONFIG, 0x2, (rgb_config << 8) | (alpha_config << 12));
}
const u8 GPU_TEVID[]={0xC0,0xC8,0xD0,0xD8,0xF0,0xF8};
void GPU_SetTexEnv(u8 id, u16 rgbSources, u16 alphaSources, u16 rgbOperands, u16 alphaOperands, GPU_COMBINEFUNC rgbCombine, GPU_COMBINEFUNC alphaCombine, u32 constantColor)
{
if(id>6)return;
u32 param[0x5];
memset(param, 0x00, 5*4);
param[0x0]=(alphaSources<<16)|(rgbSources);
param[0x1]=(alphaOperands<<12)|(rgbOperands);
param[0x2]=(alphaCombine<<16)|(rgbCombine);
param[0x3]=constantColor;
param[0x4]=0x00000000; // ?
GPUCMD_AddIncrementalWrites(GPUREG_0000|GPU_TEVID[id], param, 0x00000005);
}
void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count)
{
//set primitive type
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001);
//index buffer address register should be cleared (except bit 31) before drawing
GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000);
//pass number of vertices
GPUCMD_AddWrite(GPUREG_NUMVERTICES, count);
//set first vertex
GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, first);
//all the following except 0x000F022E might be useless
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_DRAWARRAYS, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
}
void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n)
{
//set primitive type
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001);
//index buffer (TODO : support multiple types)
GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000|((u32)indexArray));
//pass number of vertices
GPUCMD_AddWrite(GPUREG_NUMVERTICES, n);
GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0x2, 0x00000100);
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x2, 0x00000100);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000000);
GPUCMD_AddWrite(GPUREG_DRAWELEMENTS, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
// CHECKME: does this one also require command 0x0111 at the end?
}
void GPU_FinishDrawing()
{
GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
GPUCMD_AddWrite(GPUREG_0063, 0x00000001);
}
void GPU_SetShaderOutmap(u32 outmapData[8])
{
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x1, outmapData[0]-1);
GPUCMD_AddIncrementalWrites(GPUREG_SH_OUTMAP_TOTAL, outmapData, 8);
}
void GPU_SendShaderCode(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length)
{
if(!data)return;
int regOffset=(type==GPU_GEOMETRY_SHADER)?(-0x30):(0x0);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_CONFIG+regOffset, offset);
int i;
for(i=0;i<length;i+=0x80)GPUCMD_AddWrites(GPUREG_VSH_CODETRANSFER_DATA+regOffset, &data[i], ((length-i)<0x80)?(length-i):0x80);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_END+regOffset, 0x00000001);
}
void GPU_SendOperandDescriptors(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length)
{
if(!data)return;
int regOffset=(type==GPU_GEOMETRY_SHADER)?(-0x30):(0x0);
GPUCMD_AddWrite(GPUREG_VSH_OPDESCS_CONFIG+regOffset, offset);
GPUCMD_AddWrites(GPUREG_VSH_OPDESCS_DATA+regOffset, data, length);
}

31
libctru/source/gpu/shaderProgram.c
View File

@ -225,3 +225,34 @@ Result shaderProgramUse(shaderProgram_s* sp)
return 0;
}
void GPU_SetShaderOutmap(u32 outmapData[8])
{
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x1, outmapData[0]-1);
GPUCMD_AddIncrementalWrites(GPUREG_SH_OUTMAP_TOTAL, outmapData, 8);
}
void GPU_SendShaderCode(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length)
{
if(!data)return;
int regOffset=(type==GPU_GEOMETRY_SHADER)?(-0x30):(0x0);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_CONFIG+regOffset, offset);
int i;
for(i=0;i<length;i+=0x80)GPUCMD_AddWrites(GPUREG_VSH_CODETRANSFER_DATA+regOffset, &data[i], ((length-i)<0x80)?(length-i):0x80);
GPUCMD_AddWrite(GPUREG_VSH_CODETRANSFER_END+regOffset, 0x00000001);
}
void GPU_SendOperandDescriptors(GPU_SHADER_TYPE type, u32* data, u16 offset, u16 length)
{
if(!data)return;
int regOffset=(type==GPU_GEOMETRY_SHADER)?(-0x30):(0x0);
GPUCMD_AddWrite(GPUREG_VSH_OPDESCS_CONFIG+regOffset, offset);
GPUCMD_AddWrites(GPUREG_VSH_OPDESCS_DATA+regOffset, data, length);
}