Add fragment lighting register names, enumerations, etc
This commit is contained in:
parent
730899bee6
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c99707ada4
@ -82,8 +82,8 @@ static void sceneRender(void)
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// Upload the projection matrix
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// Upload the projection matrix
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GPU_SetFloatUniformMatrix(GPU_GEOMETRY_SHADER, uLoc_projection, &projection);
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GPU_SetFloatUniformMatrix(GPU_GEOMETRY_SHADER, uLoc_projection, &projection);
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// Draw the VBO - GPU_UNKPRIM allows the geoshader to control primitive emission
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// Draw the VBO - GPU_GEOMETRY_PRIM allows the geoshader to control primitive emission
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GPU_DrawArray(GPU_UNKPRIM, 0, vertex_list_count);
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GPU_DrawArray(GPU_GEOMETRY_PRIM, 0, vertex_list_count);
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}
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}
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static void sceneExit(void)
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static void sceneExit(void)
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@ -13,7 +13,7 @@ typedef enum
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{
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{
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GPU_NEAREST = 0x0,
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GPU_NEAREST = 0x0,
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GPU_LINEAR = 0x1,
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GPU_LINEAR = 0x1,
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}GPU_TEXTURE_FILTER_PARAM;
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} GPU_TEXTURE_FILTER_PARAM;
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typedef enum
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typedef enum
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{
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{
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@ -21,30 +21,31 @@ typedef enum
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GPU_CLAMP_TO_BORDER = 0x1,
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GPU_CLAMP_TO_BORDER = 0x1,
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GPU_REPEAT = 0x2,
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GPU_REPEAT = 0x2,
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GPU_MIRRORED_REPEAT = 0x3,
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GPU_MIRRORED_REPEAT = 0x3,
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}GPU_TEXTURE_WRAP_PARAM;
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} GPU_TEXTURE_WRAP_PARAM;
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typedef enum
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typedef enum
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{
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{
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GPU_TEXUNIT0 = 0x1,
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GPU_TEXUNIT0 = 0x1,
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GPU_TEXUNIT1 = 0x2,
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GPU_TEXUNIT1 = 0x2,
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GPU_TEXUNIT2 = 0x4
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GPU_TEXUNIT2 = 0x4,
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} GPU_TEXUNIT;
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} GPU_TEXUNIT;
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typedef enum{
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typedef enum
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GPU_RGBA8=0x0,
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{
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GPU_RGB8=0x1,
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GPU_RGBA8 = 0x0,
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GPU_RGBA5551=0x2,
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GPU_RGB8 = 0x1,
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GPU_RGB565=0x3,
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GPU_RGBA5551 = 0x2,
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GPU_RGBA4=0x4,
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GPU_RGB565 = 0x3,
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GPU_LA8=0x5,
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GPU_RGBA4 = 0x4,
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GPU_HILO8=0x6,
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GPU_LA8 = 0x5,
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GPU_L8=0x7,
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GPU_HILO8 = 0x6,
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GPU_A8=0x8,
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GPU_L8 = 0x7,
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GPU_LA4=0x9,
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GPU_A8 = 0x8,
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GPU_L4=0xA,
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GPU_LA4 = 0x9,
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GPU_ETC1=0xB,
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GPU_L4 = 0xA,
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GPU_ETC1A4=0xC
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GPU_ETC1 = 0xB,
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}GPU_TEXCOLOR;
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GPU_ETC1A4 = 0xC,
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} GPU_TEXCOLOR;
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typedef enum
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typedef enum
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{
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{
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@ -55,7 +56,7 @@ typedef enum
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GPU_LESS = 4,
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GPU_LESS = 4,
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GPU_LEQUAL = 5,
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GPU_LEQUAL = 5,
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GPU_GREATER = 6,
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GPU_GREATER = 6,
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GPU_GEQUAL = 7
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GPU_GEQUAL = 7,
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}GPU_TESTFUNC;
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}GPU_TESTFUNC;
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typedef enum
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typedef enum
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@ -76,7 +77,7 @@ typedef enum
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GPU_STENCIL_DECR = 4, // old_stencil - 1 saturated to [0, 255]
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GPU_STENCIL_DECR = 4, // old_stencil - 1 saturated to [0, 255]
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GPU_STENCIL_INVERT = 5, // ~old_stencil
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GPU_STENCIL_INVERT = 5, // ~old_stencil
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GPU_STENCIL_INCR_WRAP = 6, // old_stencil + 1
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GPU_STENCIL_INCR_WRAP = 6, // old_stencil + 1
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GPU_STENCIL_DECR_WRAP = 7 // old_stencil - 1
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GPU_STENCIL_DECR_WRAP = 7, // old_stencil - 1
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} GPU_STENCILOP;
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} GPU_STENCILOP;
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typedef enum
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typedef enum
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@ -88,7 +89,7 @@ typedef enum
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GPU_WRITE_DEPTH = 0x10,
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GPU_WRITE_DEPTH = 0x10,
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GPU_WRITE_COLOR = 0x0F,
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GPU_WRITE_COLOR = 0x0F,
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GPU_WRITE_ALL = 0x1F
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GPU_WRITE_ALL = 0x1F,
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} GPU_WRITEMASK;
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} GPU_WRITEMASK;
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typedef enum
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typedef enum
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@ -97,7 +98,7 @@ typedef enum
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GPU_BLEND_SUBTRACT = 1,
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GPU_BLEND_SUBTRACT = 1,
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GPU_BLEND_REVERSE_SUBTRACT = 2,
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GPU_BLEND_REVERSE_SUBTRACT = 2,
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GPU_BLEND_MIN = 3,
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GPU_BLEND_MIN = 3,
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GPU_BLEND_MAX = 4
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GPU_BLEND_MAX = 4,
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} GPU_BLENDEQUATION;
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} GPU_BLENDEQUATION;
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typedef enum
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typedef enum
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@ -116,7 +117,7 @@ typedef enum
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GPU_ONE_MINUS_CONSTANT_COLOR = 11,
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GPU_ONE_MINUS_CONSTANT_COLOR = 11,
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GPU_CONSTANT_ALPHA = 12,
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GPU_CONSTANT_ALPHA = 12,
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GPU_ONE_MINUS_CONSTANT_ALPHA = 13,
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GPU_ONE_MINUS_CONSTANT_ALPHA = 13,
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GPU_SRC_ALPHA_SATURATE = 14
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GPU_SRC_ALPHA_SATURATE = 14,
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} GPU_BLENDFACTOR;
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} GPU_BLENDFACTOR;
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typedef enum
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typedef enum
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@ -136,29 +137,31 @@ typedef enum
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GPU_LOGICOP_EQUIV = 12,
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GPU_LOGICOP_EQUIV = 12,
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GPU_LOGICOP_AND_INVERTED = 13,
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GPU_LOGICOP_AND_INVERTED = 13,
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GPU_LOGICOP_OR_REVERSE = 14,
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GPU_LOGICOP_OR_REVERSE = 14,
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GPU_LOGICOP_OR_INVERTED = 15
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GPU_LOGICOP_OR_INVERTED = 15,
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} GPU_LOGICOP;
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} GPU_LOGICOP;
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typedef enum{
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typedef enum
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{
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GPU_BYTE = 0,
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GPU_BYTE = 0,
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GPU_UNSIGNED_BYTE = 1,
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GPU_UNSIGNED_BYTE = 1,
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GPU_SHORT = 2,
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GPU_SHORT = 2,
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GPU_FLOAT = 3
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GPU_FLOAT = 3,
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}GPU_FORMATS;
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} GPU_FORMATS;
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//defines for CW ?
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typedef enum
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typedef enum{
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{
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GPU_CULL_NONE = 0,
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GPU_CULL_NONE = 0,
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GPU_CULL_FRONT_CCW = 1,
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GPU_CULL_FRONT_CCW = 1,
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GPU_CULL_BACK_CCW = 2
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GPU_CULL_BACK_CCW = 2,
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}GPU_CULLMODE;
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} GPU_CULLMODE;
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#define GPU_ATTRIBFMT(i, n, f) (((((n)-1)<<2)|((f)&3))<<((i)*4))
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#define GPU_ATTRIBFMT(i, n, f) (((((n)-1)<<2)|((f)&3))<<((i)*4))
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/**
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/**
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* Texture combiners sources
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* Texture combiners sources
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*/
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*/
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typedef enum{
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typedef enum
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{
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GPU_PRIMARY_COLOR = 0x00,
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GPU_PRIMARY_COLOR = 0x00,
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GPU_FRAGMENT_PRIMARY_COLOR = 0x01,
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GPU_FRAGMENT_PRIMARY_COLOR = 0x01,
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GPU_FRAGMENT_SECONDARY_COLOR = 0x02,
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GPU_FRAGMENT_SECONDARY_COLOR = 0x02,
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@ -169,12 +172,13 @@ typedef enum{
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GPU_PREVIOUS_BUFFER = 0x0D,
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GPU_PREVIOUS_BUFFER = 0x0D,
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GPU_CONSTANT = 0x0E,
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GPU_CONSTANT = 0x0E,
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GPU_PREVIOUS = 0x0F,
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GPU_PREVIOUS = 0x0F,
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}GPU_TEVSRC;
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} GPU_TEVSRC;
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/**
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/**
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* Texture RGB combiners operands
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* Texture RGB combiners operands
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*/
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*/
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typedef enum{
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typedef enum
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{
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GPU_TEVOP_RGB_SRC_COLOR = 0x00,
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GPU_TEVOP_RGB_SRC_COLOR = 0x00,
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GPU_TEVOP_RGB_ONE_MINUS_SRC_COLOR = 0x01,
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GPU_TEVOP_RGB_ONE_MINUS_SRC_COLOR = 0x01,
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GPU_TEVOP_RGB_SRC_ALPHA = 0x02,
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GPU_TEVOP_RGB_SRC_ALPHA = 0x02,
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@ -191,13 +195,14 @@ typedef enum{
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GPU_TEVOP_RGB_ONE_MINUS_SRC_B = 0x0D,
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GPU_TEVOP_RGB_ONE_MINUS_SRC_B = 0x0D,
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GPU_TEVOP_RGB_0x0E = 0x0E,
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GPU_TEVOP_RGB_0x0E = 0x0E,
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GPU_TEVOP_RGB_0x0F = 0x0F,
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GPU_TEVOP_RGB_0x0F = 0x0F,
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}GPU_TEVOP_RGB;
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} GPU_TEVOP_RGB;
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/**
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/**
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* Texture ALPHA combiners operands
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* Texture ALPHA combiners operands
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*/
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*/
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typedef enum{
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typedef enum
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{
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GPU_TEVOP_A_SRC_ALPHA = 0x00,
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GPU_TEVOP_A_SRC_ALPHA = 0x00,
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GPU_TEVOP_A_ONE_MINUS_SRC_ALPHA = 0x01,
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GPU_TEVOP_A_ONE_MINUS_SRC_ALPHA = 0x01,
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GPU_TEVOP_A_SRC_R = 0x02,
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GPU_TEVOP_A_SRC_R = 0x02,
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@ -206,12 +211,13 @@ typedef enum{
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GPU_TEVOP_A_ONE_MINUS_SRC_G = 0x05,
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GPU_TEVOP_A_ONE_MINUS_SRC_G = 0x05,
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GPU_TEVOP_A_SRC_B = 0x06,
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GPU_TEVOP_A_SRC_B = 0x06,
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GPU_TEVOP_A_ONE_MINUS_SRC_B = 0x07,
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GPU_TEVOP_A_ONE_MINUS_SRC_B = 0x07,
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}GPU_TEVOP_A;
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} GPU_TEVOP_A;
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/**
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/**
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* Texture combiner functions
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* Texture combiner functions
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*/
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*/
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typedef enum{
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typedef enum
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{
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GPU_REPLACE = 0x00,
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GPU_REPLACE = 0x00,
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GPU_MODULATE = 0x01,
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GPU_MODULATE = 0x01,
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GPU_ADD = 0x02,
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GPU_ADD = 0x02,
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@ -219,29 +225,97 @@ typedef enum{
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GPU_INTERPOLATE = 0x04,
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GPU_INTERPOLATE = 0x04,
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GPU_SUBTRACT = 0x05,
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GPU_SUBTRACT = 0x05,
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GPU_DOT3_RGB = 0x06, //RGB only
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GPU_DOT3_RGB = 0x06, //RGB only
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GPU_DOT3_RGBA = 0x07,
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GPU_MULTIPLY_ADD = 0x08,
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}GPU_COMBINEFUNC;
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GPU_ADD_MULTIPLY = 0x09,
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} GPU_COMBINEFUNC;
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/**
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/**
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* Texture scale factors
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* Texture scale factors
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*/
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*/
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typedef enum{
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typedef enum
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{
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GPU_TEVSCALE_1 = 0x0,
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GPU_TEVSCALE_1 = 0x0,
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GPU_TEVSCALE_2 = 0x1,
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GPU_TEVSCALE_2 = 0x1,
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GPU_TEVSCALE_4 = 0x2,
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GPU_TEVSCALE_4 = 0x2,
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}GPU_TEVSCALE;
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} GPU_TEVSCALE;
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#define GPU_TEVSOURCES(a,b,c) (((a))|((b)<<4)|((c)<<8))
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#define GPU_TEVSOURCES(a,b,c) (((a))|((b)<<4)|((c)<<8))
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#define GPU_TEVOPERANDS(a,b,c) (((a))|((b)<<4)|((c)<<8))
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#define GPU_TEVOPERANDS(a,b,c) (((a))|((b)<<4)|((c)<<8))
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typedef enum{
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#define GPU_LIGHT_ENV_LAYER_CONFIG(n) ((n)+((n)==7))
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#define GPU_LC1_SHADOWBIT(n) BIT(n)
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#define GPU_LC1_SPOTBIT(n) BIT((n)+8)
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#define GPU_LC1_LUTBIT(n) BIT((n)+16)
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#define GPU_LC1_ATTNBIT(n) BIT((n)+24)
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#define GPU_LIGHTPERM(i,n) ((n) << (i))
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#define GPU_LIGHTLUTINPUT(i,n) ((n) << ((i)*4))
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#define GPU_LIGHTLUTIDX(c,i,o) ((o) | ((i) << 8) | ((c) << 11))
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#define GPU_LIGHTCOLOR(r,g,b) (((b) & 0xFF) | (((g) << 10) & 0xFF) | (((r) << 20) & 0xFF))
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typedef enum
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{
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GPU_NO_FRESNEL = 0,
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GPU_PRI_ALPHA_FRESNEL = 1,
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GPU_SEC_ALPHA_FRESNEL = 2,
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GPU_PRI_SEC_ALPHA_FRESNEL = 3,
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} GPU_FRESNELSEL;
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typedef enum
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{
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GPU_BUMP_NOT_USED = 0,
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GPU_BUMP_AS_BUMP = 1,
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GPU_BUMP_AS_TANG = 2,
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} GPU_BUMPMODE;
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typedef enum
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{
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GPU_LUT_D0 = 0,
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GPU_LUT_D1 = 1,
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GPU_LUT_SP = 2,
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GPU_LUT_FR = 3,
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GPU_LUT_RB = 4,
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GPU_LUT_RG = 5,
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GPU_LUT_RR = 6,
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GPU_LUT_DA = 7,
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} GPU_LIGHTLUTID;
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typedef enum
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{
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GPU_LUTINPUT_NH = 0,
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GPU_LUTINPUT_VH = 1,
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GPU_LUTINPUT_NV = 2,
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GPU_LUTINPUT_LN = 3,
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GPU_LUTINPUT_SP = 4,
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GPU_LUTINPUT_CP = 5,
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} GPU_LIGHTLUTINPUT;
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typedef enum
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{
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GPU_LUTSCALER_1x = 0,
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GPU_LUTSCALER_2x = 1,
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GPU_LUTSCALER_4x = 2,
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GPU_LUTSCALER_8x = 3,
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GPU_LUTSCALER_0_25x = 6,
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GPU_LUTSCALER_0_5x = 7,
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} GPU_LIGHTLUTSCALER;
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typedef enum
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{
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GPU_LUTSELECT_COMMON = 0,
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GPU_LUTSELECT_SP = 1,
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GPU_LUTSELECT_DA = 2,
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} GPU_LIGHTLUTSELECT;
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typedef enum
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{
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GPU_TRIANGLES = 0x0000,
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GPU_TRIANGLES = 0x0000,
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GPU_TRIANGLE_STRIP = 0x0100,
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GPU_TRIANGLE_STRIP = 0x0100,
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GPU_TRIANGLE_FAN = 0x0200,
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GPU_TRIANGLE_FAN = 0x0200,
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GPU_UNKPRIM = 0x0300 // ?
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GPU_GEOMETRY_PRIM = 0x0300,
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}GPU_Primitive_t;
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} GPU_Primitive_t;
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typedef enum{
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typedef enum
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GPU_VERTEX_SHADER=0x0,
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{
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GPU_GEOMETRY_SHADER=0x1
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GPU_VERTEX_SHADER = 0x0,
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}GPU_SHADER_TYPE;
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GPU_GEOMETRY_SHADER = 0x1,
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} GPU_SHADER_TYPE;
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void GPUCMD_Add(u32 header, u32* param, u32 paramlength);
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void GPUCMD_Add(u32 header, u32* param, u32 paramlength);
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void GPUCMD_Finalize(void);
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void GPUCMD_Finalize(void);
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u32 f32tof16(float f);
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u32 f32tof20(float f);
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u32 f32tof24(float f);
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u32 f32tof24(float f);
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u32 f32tof31(float f);
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u32 f32tof31(float f);
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#define GPUREG_008C 0x008C
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#define GPUREG_008C 0x008C
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#define GPUREG_008D 0x008D
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#define GPUREG_008D 0x008D
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#define GPUREG_TEXUNIT0_TYPE 0x008E
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#define GPUREG_TEXUNIT0_TYPE 0x008E
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#define GPUREG_008F 0x008F
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#define GPUREG_LIGHTING_ENABLE0 0x008F
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#define GPUREG_0090 0x0090
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#define GPUREG_0090 0x0090
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#define GPUREG_TEXUNIT1_BORDER_COLOR 0x0091
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#define GPUREG_TEXUNIT1_BORDER_COLOR 0x0091
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#define GPUREG_TEXUNIT1_DIM 0x0092
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#define GPUREG_TEXUNIT1_DIM 0x0092
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// Fragment lighting registers (0x140-0x1FF)
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// Fragment lighting registers (0x140-0x1FF)
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#define GPUREG_0140 0x0140
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#define GPUREG_LIGHT0_SPECULAR0 0x0140
|
||||||
#define GPUREG_0141 0x0141
|
#define GPUREG_LIGHT0_SPECULAR1 0x0141
|
||||||
#define GPUREG_0142 0x0142
|
#define GPUREG_LIGHT0_DIFFUSE 0x0142
|
||||||
#define GPUREG_0143 0x0143
|
#define GPUREG_LIGHT0_AMBIENT 0x0143
|
||||||
#define GPUREG_0144 0x0144
|
#define GPUREG_LIGHT0_XY 0x0144
|
||||||
#define GPUREG_0145 0x0145
|
#define GPUREG_LIGHT0_Z 0x0145
|
||||||
#define GPUREG_0146 0x0146
|
#define GPUREG_LIGHT0_SPOTDIR_XY 0x0146
|
||||||
#define GPUREG_0147 0x0147
|
#define GPUREG_LIGHT0_SPOTDIR_Z 0x0147
|
||||||
#define GPUREG_0148 0x0148
|
#define GPUREG_0148 0x0148
|
||||||
#define GPUREG_0149 0x0149
|
#define GPUREG_LIGHT0_CONFIG 0x0149
|
||||||
#define GPUREG_014A 0x014A
|
#define GPUREG_LIGHT0_ATTENUATION_BIAS 0x014A
|
||||||
#define GPUREG_014B 0x014B
|
#define GPUREG_LIGHT0_ATTENUATION_SCALE 0x014B
|
||||||
#define GPUREG_014C 0x014C
|
#define GPUREG_014C 0x014C
|
||||||
#define GPUREG_014D 0x014D
|
#define GPUREG_014D 0x014D
|
||||||
#define GPUREG_014E 0x014E
|
#define GPUREG_014E 0x014E
|
||||||
#define GPUREG_014F 0x014F
|
#define GPUREG_014F 0x014F
|
||||||
#define GPUREG_0150 0x0150
|
#define GPUREG_LIGHT1_SPECULAR0 0x0150
|
||||||
#define GPUREG_0151 0x0151
|
#define GPUREG_LIGHT1_SPECULAR1 0x0151
|
||||||
#define GPUREG_0152 0x0152
|
#define GPUREG_LIGHT1_DIFFUSE 0x0152
|
||||||
#define GPUREG_0153 0x0153
|
#define GPUREG_LIGHT1_AMBIENT 0x0153
|
||||||
#define GPUREG_0154 0x0154
|
#define GPUREG_LIGHT1_XY 0x0154
|
||||||
#define GPUREG_0155 0x0155
|
#define GPUREG_LIGHT1_Z 0x0155
|
||||||
#define GPUREG_0156 0x0156
|
#define GPUREG_LIGHT1_SPOTDIR_XY 0x0156
|
||||||
#define GPUREG_0157 0x0157
|
#define GPUREG_LIGHT1_SPOTDIR_Z 0x0157
|
||||||
#define GPUREG_0158 0x0158
|
#define GPUREG_0158 0x0158
|
||||||
#define GPUREG_0159 0x0159
|
#define GPUREG_LIGHT1_CONFIG 0x0159
|
||||||
#define GPUREG_015A 0x015A
|
#define GPUREG_LIGHT1_ATTENUATION_BIAS 0x015A
|
||||||
#define GPUREG_015B 0x015B
|
#define GPUREG_LIGHT1_ATTENUATION_SCALE 0x015B
|
||||||
#define GPUREG_015C 0x015C
|
#define GPUREG_015C 0x015C
|
||||||
#define GPUREG_015D 0x015D
|
#define GPUREG_015D 0x015D
|
||||||
#define GPUREG_015E 0x015E
|
#define GPUREG_015E 0x015E
|
||||||
#define GPUREG_015F 0x015F
|
#define GPUREG_015F 0x015F
|
||||||
#define GPUREG_0160 0x0160
|
#define GPUREG_LIGHT2_SPECULAR0 0x0160
|
||||||
#define GPUREG_0161 0x0161
|
#define GPUREG_LIGHT2_SPECULAR1 0x0161
|
||||||
#define GPUREG_0162 0x0162
|
#define GPUREG_LIGHT2_DIFFUSE 0x0162
|
||||||
#define GPUREG_0163 0x0163
|
#define GPUREG_LIGHT2_AMBIENT 0x0163
|
||||||
#define GPUREG_0164 0x0164
|
#define GPUREG_LIGHT2_XY 0x0164
|
||||||
#define GPUREG_0165 0x0165
|
#define GPUREG_LIGHT2_Z 0x0165
|
||||||
#define GPUREG_0166 0x0166
|
#define GPUREG_LIGHT2_SPOTDIR_XY 0x0166
|
||||||
#define GPUREG_0167 0x0167
|
#define GPUREG_LIGHT2_SPOTDIR_Z 0x0167
|
||||||
#define GPUREG_0168 0x0168
|
#define GPUREG_0168 0x0168
|
||||||
#define GPUREG_0169 0x0169
|
#define GPUREG_LIGHT2_CONFIG 0x0169
|
||||||
#define GPUREG_016A 0x016A
|
#define GPUREG_LIGHT2_ATTENUATION_BIAS 0x016A
|
||||||
#define GPUREG_016B 0x016B
|
#define GPUREG_LIGHT2_ATTENUATION_SCALE 0x016B
|
||||||
#define GPUREG_016C 0x016C
|
#define GPUREG_016C 0x016C
|
||||||
#define GPUREG_016D 0x016D
|
#define GPUREG_016D 0x016D
|
||||||
#define GPUREG_016E 0x016E
|
#define GPUREG_016E 0x016E
|
||||||
#define GPUREG_016F 0x016F
|
#define GPUREG_016F 0x016F
|
||||||
#define GPUREG_0170 0x0170
|
#define GPUREG_LIGHT3_SPECULAR0 0x0170
|
||||||
#define GPUREG_0171 0x0171
|
#define GPUREG_LIGHT3_SPECULAR1 0x0171
|
||||||
#define GPUREG_0172 0x0172
|
#define GPUREG_LIGHT3_DIFFUSE 0x0172
|
||||||
#define GPUREG_0173 0x0173
|
#define GPUREG_LIGHT3_AMBIENT 0x0173
|
||||||
#define GPUREG_0174 0x0174
|
#define GPUREG_LIGHT3_XY 0x0174
|
||||||
#define GPUREG_0175 0x0175
|
#define GPUREG_LIGHT3_Z 0x0175
|
||||||
#define GPUREG_0176 0x0176
|
#define GPUREG_LIGHT3_SPOTDIR_XY 0x0176
|
||||||
#define GPUREG_0177 0x0177
|
#define GPUREG_LIGHT3_SPOTDIR_Z 0x0177
|
||||||
#define GPUREG_0178 0x0178
|
#define GPUREG_0178 0x0178
|
||||||
#define GPUREG_0179 0x0179
|
#define GPUREG_LIGHT3_CONFIG 0x0179
|
||||||
#define GPUREG_017A 0x017A
|
#define GPUREG_LIGHT3_ATTENUATION_BIAS 0x017A
|
||||||
#define GPUREG_017B 0x017B
|
#define GPUREG_LIGHT3_ATTENUATION_SCALE 0x017B
|
||||||
#define GPUREG_017C 0x017C
|
#define GPUREG_017C 0x017C
|
||||||
#define GPUREG_017D 0x017D
|
#define GPUREG_017D 0x017D
|
||||||
#define GPUREG_017E 0x017E
|
#define GPUREG_017E 0x017E
|
||||||
#define GPUREG_017F 0x017F
|
#define GPUREG_017F 0x017F
|
||||||
#define GPUREG_0180 0x0180
|
#define GPUREG_LIGHT4_SPECULAR0 0x0180
|
||||||
#define GPUREG_0181 0x0181
|
#define GPUREG_LIGHT4_SPECULAR1 0x0181
|
||||||
#define GPUREG_0182 0x0182
|
#define GPUREG_LIGHT4_DIFFUSE 0x0182
|
||||||
#define GPUREG_0183 0x0183
|
#define GPUREG_LIGHT4_AMBIENT 0x0183
|
||||||
#define GPUREG_0184 0x0184
|
#define GPUREG_LIGHT4_XY 0x0184
|
||||||
#define GPUREG_0185 0x0185
|
#define GPUREG_LIGHT4_Z 0x0185
|
||||||
#define GPUREG_0186 0x0186
|
#define GPUREG_LIGHT4_SPOTDIR_XY 0x0186
|
||||||
#define GPUREG_0187 0x0187
|
#define GPUREG_LIGHT4_SPOTDIR_Z 0x0187
|
||||||
#define GPUREG_0188 0x0188
|
#define GPUREG_0188 0x0188
|
||||||
#define GPUREG_0189 0x0189
|
#define GPUREG_LIGHT4_CONFIG 0x0189
|
||||||
#define GPUREG_018A 0x018A
|
#define GPUREG_LIGHT4_ATTENUATION_BIAS 0x018A
|
||||||
#define GPUREG_018B 0x018B
|
#define GPUREG_LIGHT4_ATTENUATION_SCALE 0x018B
|
||||||
#define GPUREG_018C 0x018C
|
#define GPUREG_018C 0x018C
|
||||||
#define GPUREG_018D 0x018D
|
#define GPUREG_018D 0x018D
|
||||||
#define GPUREG_018E 0x018E
|
#define GPUREG_018E 0x018E
|
||||||
#define GPUREG_018F 0x018F
|
#define GPUREG_018F 0x018F
|
||||||
#define GPUREG_0190 0x0190
|
#define GPUREG_LIGHT5_SPECULAR0 0x0190
|
||||||
#define GPUREG_0191 0x0191
|
#define GPUREG_LIGHT5_SPECULAR1 0x0191
|
||||||
#define GPUREG_0192 0x0192
|
#define GPUREG_LIGHT5_DIFFUSE 0x0192
|
||||||
#define GPUREG_0193 0x0193
|
#define GPUREG_LIGHT5_AMBIENT 0x0193
|
||||||
#define GPUREG_0194 0x0194
|
#define GPUREG_LIGHT5_XY 0x0194
|
||||||
#define GPUREG_0195 0x0195
|
#define GPUREG_LIGHT5_Z 0x0195
|
||||||
#define GPUREG_0196 0x0196
|
#define GPUREG_LIGHT5_SPOTDIR_XY 0x0196
|
||||||
#define GPUREG_0197 0x0197
|
#define GPUREG_LIGHT5_SPOTDIR_Z 0x0197
|
||||||
#define GPUREG_0198 0x0198
|
#define GPUREG_0198 0x0198
|
||||||
#define GPUREG_0199 0x0199
|
#define GPUREG_LIGHT5_CONFIG 0x0199
|
||||||
#define GPUREG_019A 0x019A
|
#define GPUREG_LIGHT5_ATTENUATION_BIAS 0x019A
|
||||||
#define GPUREG_019B 0x019B
|
#define GPUREG_LIGHT5_ATTENUATION_SCALE 0x019B
|
||||||
#define GPUREG_019C 0x019C
|
#define GPUREG_019C 0x019C
|
||||||
#define GPUREG_019D 0x019D
|
#define GPUREG_019D 0x019D
|
||||||
#define GPUREG_019E 0x019E
|
#define GPUREG_019E 0x019E
|
||||||
#define GPUREG_019F 0x019F
|
#define GPUREG_019F 0x019F
|
||||||
#define GPUREG_01A0 0x01A0
|
#define GPUREG_LIGHT6_SPECULAR0 0x01A0
|
||||||
#define GPUREG_01A1 0x01A1
|
#define GPUREG_LIGHT6_SPECULAR1 0x01A1
|
||||||
#define GPUREG_01A2 0x01A2
|
#define GPUREG_LIGHT6_DIFFUSE 0x01A2
|
||||||
#define GPUREG_01A3 0x01A3
|
#define GPUREG_LIGHT6_AMBIENT 0x01A3
|
||||||
#define GPUREG_01A4 0x01A4
|
#define GPUREG_LIGHT6_XY 0x01A4
|
||||||
#define GPUREG_01A5 0x01A5
|
#define GPUREG_LIGHT6_Z 0x01A5
|
||||||
#define GPUREG_01A6 0x01A6
|
#define GPUREG_LIGHT6_SPOTDIR_XY 0x01A6
|
||||||
#define GPUREG_01A7 0x01A7
|
#define GPUREG_LIGHT6_SPOTDIR_Z 0x01A7
|
||||||
#define GPUREG_01A8 0x01A8
|
#define GPUREG_01A8 0x01A8
|
||||||
#define GPUREG_01A9 0x01A9
|
#define GPUREG_LIGHT6_CONFIG 0x01A9
|
||||||
#define GPUREG_01AA 0x01AA
|
#define GPUREG_LIGHT6_ATTENUATION_BIAS 0x01AA
|
||||||
#define GPUREG_01AB 0x01AB
|
#define GPUREG_LIGHT6_ATTENUATION_SCALE 0x01AB
|
||||||
#define GPUREG_01AC 0x01AC
|
#define GPUREG_01AC 0x01AC
|
||||||
#define GPUREG_01AD 0x01AD
|
#define GPUREG_01AD 0x01AD
|
||||||
#define GPUREG_01AE 0x01AE
|
#define GPUREG_01AE 0x01AE
|
||||||
#define GPUREG_01AF 0x01AF
|
#define GPUREG_01AF 0x01AF
|
||||||
#define GPUREG_01B0 0x01B0
|
#define GPUREG_LIGHT7_SPECULAR0 0x01B0
|
||||||
#define GPUREG_01B1 0x01B1
|
#define GPUREG_LIGHT7_SPECULAR1 0x01B1
|
||||||
#define GPUREG_01B2 0x01B2
|
#define GPUREG_LIGHT7_DIFFUSE 0x01B2
|
||||||
#define GPUREG_01B3 0x01B3
|
#define GPUREG_LIGHT7_AMBIENT 0x01B3
|
||||||
#define GPUREG_01B4 0x01B4
|
#define GPUREG_LIGHT7_XY 0x01B4
|
||||||
#define GPUREG_01B5 0x01B5
|
#define GPUREG_LIGHT7_Z 0x01B5
|
||||||
#define GPUREG_01B6 0x01B6
|
#define GPUREG_LIGHT7_SPOTDIR_XY 0x01B6
|
||||||
#define GPUREG_01B7 0x01B7
|
#define GPUREG_LIGHT7_SPOTDIR_Z 0x01B7
|
||||||
#define GPUREG_01B8 0x01B8
|
#define GPUREG_01B8 0x01B8
|
||||||
#define GPUREG_01B9 0x01B9
|
#define GPUREG_LIGHT7_CONFIG 0x01B9
|
||||||
#define GPUREG_01BA 0x01BA
|
#define GPUREG_LIGHT7_ATTENUATION_BIAS 0x01BA
|
||||||
#define GPUREG_01BB 0x01BB
|
#define GPUREG_LIGHT7_ATTENUATION_SCALE 0x01BB
|
||||||
#define GPUREG_01BC 0x01BC
|
#define GPUREG_01BC 0x01BC
|
||||||
#define GPUREG_01BD 0x01BD
|
#define GPUREG_01BD 0x01BD
|
||||||
#define GPUREG_01BE 0x01BE
|
#define GPUREG_01BE 0x01BE
|
||||||
#define GPUREG_01BF 0x01BF
|
#define GPUREG_01BF 0x01BF
|
||||||
#define GPUREG_01C0 0x01C0
|
#define GPUREG_LIGHTING_AMBIENT 0x01C0
|
||||||
#define GPUREG_01C1 0x01C1
|
#define GPUREG_01C1 0x01C1
|
||||||
#define GPUREG_01C2 0x01C2
|
#define GPUREG_LIGHTING_NUM_LIGHTS 0x01C2
|
||||||
#define GPUREG_01C3 0x01C3
|
#define GPUREG_LIGHTING_CONFIG0 0x01C3
|
||||||
#define GPUREG_01C4 0x01C4
|
#define GPUREG_LIGHTING_CONFIG1 0x01C4
|
||||||
#define GPUREG_01C5 0x01C5
|
#define GPUREG_LIGHTING_LUT_INDEX 0x01C5
|
||||||
#define GPUREG_01C6 0x01C6
|
#define GPUREG_LIGHTING_ENABLE1 0x01C6
|
||||||
#define GPUREG_01C7 0x01C7
|
#define GPUREG_01C7 0x01C7
|
||||||
#define GPUREG_01C8 0x01C8
|
#define GPUREG_LIGHTING_LUT_DATA0 0x01C8
|
||||||
#define GPUREG_01C9 0x01C9
|
#define GPUREG_LIGHTING_LUT_DATA1 0x01C9
|
||||||
#define GPUREG_01CA 0x01CA
|
#define GPUREG_LIGHTING_LUT_DATA2 0x01CA
|
||||||
#define GPUREG_01CB 0x01CB
|
#define GPUREG_LIGHTING_LUT_DATA3 0x01CB
|
||||||
#define GPUREG_01CC 0x01CC
|
#define GPUREG_LIGHTING_LUT_DATA4 0x01CC
|
||||||
#define GPUREG_01CD 0x01CD
|
#define GPUREG_LIGHTING_LUT_DATA5 0x01CD
|
||||||
#define GPUREG_01CE 0x01CE
|
#define GPUREG_LIGHTING_LUT_DATA6 0x01CE
|
||||||
#define GPUREG_01CF 0x01CF
|
#define GPUREG_LIGHTING_LUT_DATA7 0x01CF
|
||||||
#define GPUREG_01D0 0x01D0
|
#define GPUREG_LIGHTING_LUTINPUT_ABS 0x01D0
|
||||||
#define GPUREG_01D1 0x01D1
|
#define GPUREG_LIGHTING_LUTINPUT_SELECT 0x01D1
|
||||||
#define GPUREG_01D2 0x01D2
|
#define GPUREG_LIGHTING_LUTINPUT_SCALE 0x01D2
|
||||||
#define GPUREG_01D3 0x01D3
|
#define GPUREG_01D3 0x01D3
|
||||||
#define GPUREG_01D4 0x01D4
|
#define GPUREG_01D4 0x01D4
|
||||||
#define GPUREG_01D5 0x01D5
|
#define GPUREG_01D5 0x01D5
|
||||||
#define GPUREG_01D6 0x01D6
|
#define GPUREG_01D6 0x01D6
|
||||||
#define GPUREG_01D7 0x01D7
|
#define GPUREG_01D7 0x01D7
|
||||||
#define GPUREG_01D8 0x01D8
|
#define GPUREG_01D8 0x01D8
|
||||||
#define GPUREG_01D9 0x01D9
|
#define GPUREG_LIGHTING_LIGHT_PERMUTATION 0x01D9
|
||||||
#define GPUREG_01DA 0x01DA
|
#define GPUREG_01DA 0x01DA
|
||||||
#define GPUREG_01DB 0x01DB
|
#define GPUREG_01DB 0x01DB
|
||||||
#define GPUREG_01DC 0x01DC
|
#define GPUREG_01DC 0x01DC
|
||||||
|
@ -96,6 +96,68 @@ static inline u32 floatrawbits(float f)
|
|||||||
return s.i;
|
return s.i;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// f16 has:
|
||||||
|
// - 1 sign bit
|
||||||
|
// - 5 exponent bits
|
||||||
|
// - 10 mantissa bits
|
||||||
|
u32 f32tof16(float f)
|
||||||
|
{
|
||||||
|
u32 i = floatrawbits(f);
|
||||||
|
|
||||||
|
u32 mantissa = (i << 9) >> 9;
|
||||||
|
s32 exponent = (i << 1) >> 24;
|
||||||
|
u32 sign = (i << 0) >> 31;
|
||||||
|
|
||||||
|
// Truncate mantissa
|
||||||
|
mantissa >>= 13;
|
||||||
|
|
||||||
|
// Re-bias exponent
|
||||||
|
exponent = exponent - 127 + 15;
|
||||||
|
if (exponent < 0)
|
||||||
|
{
|
||||||
|
// Underflow: flush to zero
|
||||||
|
return sign << 15;
|
||||||
|
}
|
||||||
|
else if (exponent > 0x1F)
|
||||||
|
{
|
||||||
|
// Overflow: saturate to infinity
|
||||||
|
return sign << 15 | 0x1F << 10;
|
||||||
|
}
|
||||||
|
|
||||||
|
return sign << 15 | exponent << 10 | mantissa;
|
||||||
|
}
|
||||||
|
|
||||||
|
// f20 has:
|
||||||
|
// - 1 sign bit
|
||||||
|
// - 7 exponent bits
|
||||||
|
// - 12 mantissa bits
|
||||||
|
u32 f32tof20(float f)
|
||||||
|
{
|
||||||
|
u32 i = floatrawbits(f);
|
||||||
|
|
||||||
|
u32 mantissa = (i << 9) >> 9;
|
||||||
|
s32 exponent = (i << 1) >> 24;
|
||||||
|
u32 sign = (i << 0) >> 31;
|
||||||
|
|
||||||
|
// Truncate mantissa
|
||||||
|
mantissa >>= 11;
|
||||||
|
|
||||||
|
// Re-bias exponent
|
||||||
|
exponent = exponent - 127 + 63;
|
||||||
|
if (exponent < 0)
|
||||||
|
{
|
||||||
|
// Underflow: flush to zero
|
||||||
|
return sign << 19;
|
||||||
|
}
|
||||||
|
else if (exponent > 0x7F)
|
||||||
|
{
|
||||||
|
// Overflow: saturate to infinity
|
||||||
|
return sign << 19 | 0x7F << 12;
|
||||||
|
}
|
||||||
|
|
||||||
|
return sign << 19 | exponent << 12 | mantissa;
|
||||||
|
}
|
||||||
|
|
||||||
// f24 has:
|
// f24 has:
|
||||||
// - 1 sign bit
|
// - 1 sign bit
|
||||||
// - 7 exponent bits
|
// - 7 exponent bits
|
||||||
|
Loading…
Reference in New Issue
Block a user