diff --git a/libctru/include/3ds.h b/libctru/include/3ds.h index a187949..a1ee5ad 100644 --- a/libctru/include/3ds.h +++ b/libctru/include/3ds.h @@ -1,3 +1,7 @@ +/** + * @file 3ds.h + * @brief Central 3DS header. Includes all others. + */ #pragma once #ifdef __cplusplus diff --git a/libctru/include/3ds/gpu/enums.h b/libctru/include/3ds/gpu/enums.h index 58645b2..0b6ba15 100644 --- a/libctru/include/3ds/gpu/enums.h +++ b/libctru/include/3ds/gpu/enums.h @@ -1,321 +1,349 @@ +/** + * @file enums.h + * @brief GPU enumeration values. + */ #pragma once -//tex param -#define GPU_TEXTURE_MAG_FILTER(v) (((v)&0x1)<<1) //takes a GPU_TEXTURE_FILTER_PARAM -#define GPU_TEXTURE_MIN_FILTER(v) (((v)&0x1)<<2) //takes a GPU_TEXTURE_FILTER_PARAM -#define GPU_TEXTURE_WRAP_S(v) (((v)&0x3)<<12) //takes a GPU_TEXTURE_WRAP_PARAM -#define GPU_TEXTURE_WRAP_T(v) (((v)&0x3)<<8) //takes a GPU_TEXTURE_WRAP_PARAM +/// Creates a texture magnification filter parameter from a @ref GPU_TEXTURE_FILTER_PARAM +#define GPU_TEXTURE_MAG_FILTER(v) (((v)&0x1)<<1) +/// Creates a texture minification filter parameter from a @ref GPU_TEXTURE_FILTER_PARAM +#define GPU_TEXTURE_MIN_FILTER(v) (((v)&0x1)<<2) +/// Creates a texture wrap S parameter from a @ref GPU_TEXTURE_WRAP_PARAM +#define GPU_TEXTURE_WRAP_S(v) (((v)&0x3)<<12) +/// Creates a texture wrap T parameter from a @ref GPU_TEXTURE_WRAP_PARAM +#define GPU_TEXTURE_WRAP_T(v) (((v)&0x3)<<8) -// Combiner buffer write config +/// Creates a combiner buffer write configuration. #define GPU_TEV_BUFFER_WRITE_CONFIG(stage0, stage1, stage2, stage3) ((stage0) | ((stage1) << 1) | ((stage2) << 2) | ((stage3) << 3)) +/// Texture filters. typedef enum { - GPU_NEAREST = 0x0, - GPU_LINEAR = 0x1, + GPU_NEAREST = 0x0, ///< Nearest. + GPU_LINEAR = 0x1, ///< Linear. } GPU_TEXTURE_FILTER_PARAM; +/// Texture wrap modes. typedef enum { - GPU_CLAMP_TO_EDGE = 0x0, - GPU_CLAMP_TO_BORDER = 0x1, - GPU_REPEAT = 0x2, - GPU_MIRRORED_REPEAT = 0x3, + GPU_CLAMP_TO_EDGE = 0x0, ///< Clamps to edge. + GPU_CLAMP_TO_BORDER = 0x1, ///< Clamps to border. + GPU_REPEAT = 0x2, ///< Repeats texture. + GPU_MIRRORED_REPEAT = 0x3, ///< Repeats with mirrored texture. } GPU_TEXTURE_WRAP_PARAM; +/// Supported texture units. typedef enum { - GPU_TEXUNIT0 = 0x1, - GPU_TEXUNIT1 = 0x2, - GPU_TEXUNIT2 = 0x4, + GPU_TEXUNIT0 = 0x1, ///< Texture unit 0. + GPU_TEXUNIT1 = 0x2, ///< Texture unit 1. + GPU_TEXUNIT2 = 0x4, ///< Texture unit 2. } GPU_TEXUNIT; +/// Supported pixel formats. typedef enum { - GPU_RGBA8 = 0x0, - GPU_RGB8 = 0x1, - GPU_RGBA5551 = 0x2, - GPU_RGB565 = 0x3, - GPU_RGBA4 = 0x4, - GPU_LA8 = 0x5, - GPU_HILO8 = 0x6, - GPU_L8 = 0x7, - GPU_A8 = 0x8, - GPU_LA4 = 0x9, - GPU_L4 = 0xA, - GPU_ETC1 = 0xB, - GPU_ETC1A4 = 0xC, + GPU_RGBA8 = 0x0, ///< 8-bit Red + 8-bit Green + 8-bit Blue + 8-bit Alpha + GPU_RGB8 = 0x1, ///< 8-bit Red + 8-bit Green + 8-bit Blue + GPU_RGBA5551 = 0x2, ///< 5-bit Red + 5-bit Green + 5-bit Blue + 1-bit Alpha + GPU_RGB565 = 0x3, ///< 5-bit Red + 6-bit Green + 5-bit Blue + GPU_RGBA4 = 0x4, ///< 4-bit Red + 4-bit Green + 4-bit Blue + 4-bit Alpha + GPU_LA8 = 0x5, ///< 8-bit Luminance + 8-bit Alpha + GPU_HILO8 = 0x6, ///< 8-bit Hi + 8-bit Lo + GPU_L8 = 0x7, ///< 8-bit Luminance + GPU_A8 = 0x8, ///< 8-bit Alpha + GPU_LA4 = 0x9, ///< 4-bit Luminance + 4-bit Alpha + GPU_L4 = 0xA, ///< 4-bit Luminance + GPU_ETC1 = 0xB, ///< ETC1 texture compression + GPU_ETC1A4 = 0xC, ///< ETC1 texture compression + 4-bit Alpha } GPU_TEXCOLOR; +/// Test functions. typedef enum { - GPU_NEVER = 0, - GPU_ALWAYS = 1, - GPU_EQUAL = 2, - GPU_NOTEQUAL = 3, - GPU_LESS = 4, - GPU_LEQUAL = 5, - GPU_GREATER = 6, - GPU_GEQUAL = 7, + GPU_NEVER = 0, ///< Never pass. + GPU_ALWAYS = 1, ///< Always pass. + GPU_EQUAL = 2, ///< Pass if equal. + GPU_NOTEQUAL = 3, ///< Pass if not equal. + GPU_LESS = 4, ///< Pass if less than. + GPU_LEQUAL = 5, ///< Pass if less than or equal. + GPU_GREATER = 6, ///< Pass if greater than. + GPU_GEQUAL = 7, ///< Pass if greater than or equal. }GPU_TESTFUNC; +/// Scissor test modes. typedef enum { - GPU_SCISSOR_DISABLE = 0, // disable scissor test - GPU_SCISSOR_INVERT = 1, // exclude pixels inside the scissor box + GPU_SCISSOR_DISABLE = 0, ///< Disable. + GPU_SCISSOR_INVERT = 1, ///< Exclude pixels inside the scissor box. // 2 is the same as 0 - GPU_SCISSOR_NORMAL = 3, // exclude pixels outside of the scissor box - + GPU_SCISSOR_NORMAL = 3, ///< Exclude pixels outside of the scissor box. } GPU_SCISSORMODE; +/// Stencil operations. typedef enum { - GPU_STENCIL_KEEP = 0, // old_stencil - GPU_STENCIL_ZERO = 1, // 0 - GPU_STENCIL_REPLACE = 2, // ref - GPU_STENCIL_INCR = 3, // old_stencil + 1 saturated to [0, 255] - GPU_STENCIL_DECR = 4, // old_stencil - 1 saturated to [0, 255] - GPU_STENCIL_INVERT = 5, // ~old_stencil - GPU_STENCIL_INCR_WRAP = 6, // old_stencil + 1 - GPU_STENCIL_DECR_WRAP = 7, // old_stencil - 1 + GPU_STENCIL_KEEP = 0, ///< Keep old value. (old_stencil) + GPU_STENCIL_ZERO = 1, ///< Zero. (0) + GPU_STENCIL_REPLACE = 2, ///< Replace value. (ref) + GPU_STENCIL_INCR = 3, ///< Increment value. (old_stencil + 1 saturated to [0, 255]) + GPU_STENCIL_DECR = 4, ///< Decrement value. (old_stencil - 1 saturated to [0, 255]) + GPU_STENCIL_INVERT = 5, ///< Invert value. (~old_stencil) + GPU_STENCIL_INCR_WRAP = 6, ///< Increment value. (old_stencil + 1) + GPU_STENCIL_DECR_WRAP = 7, ///< Decrement value. (old_stencil - 1) } GPU_STENCILOP; +/// Pixel write mask. typedef enum { - GPU_WRITE_RED = 0x01, - GPU_WRITE_GREEN = 0x02, - GPU_WRITE_BLUE = 0x04, - GPU_WRITE_ALPHA = 0x08, - GPU_WRITE_DEPTH = 0x10, + GPU_WRITE_RED = 0x01, ///< Write red. + GPU_WRITE_GREEN = 0x02, ///< Write green. + GPU_WRITE_BLUE = 0x04, ///< Write blue. + GPU_WRITE_ALPHA = 0x08, ///< Write alpha. + GPU_WRITE_DEPTH = 0x10, ///< Write depth. - GPU_WRITE_COLOR = 0x0F, - GPU_WRITE_ALL = 0x1F, + GPU_WRITE_COLOR = 0x0F, ///< Write all color components. + GPU_WRITE_ALL = 0x1F, ///< Write all components. } GPU_WRITEMASK; +/// Blend modes. typedef enum { - GPU_BLEND_ADD = 0, - GPU_BLEND_SUBTRACT = 1, - GPU_BLEND_REVERSE_SUBTRACT = 2, - GPU_BLEND_MIN = 3, - GPU_BLEND_MAX = 4, + GPU_BLEND_ADD = 0, ///< Add colors. + GPU_BLEND_SUBTRACT = 1, ///< Subtract colors. + GPU_BLEND_REVERSE_SUBTRACT = 2, ///< Reverse-subtract colors. + GPU_BLEND_MIN = 3, ///< Use the minimum color. + GPU_BLEND_MAX = 4, ///< Use the maximum color. } GPU_BLENDEQUATION; +/// Blend factors. typedef enum { - GPU_ZERO = 0, - GPU_ONE = 1, - GPU_SRC_COLOR = 2, - GPU_ONE_MINUS_SRC_COLOR = 3, - GPU_DST_COLOR = 4, - GPU_ONE_MINUS_DST_COLOR = 5, - GPU_SRC_ALPHA = 6, - GPU_ONE_MINUS_SRC_ALPHA = 7, - GPU_DST_ALPHA = 8, - GPU_ONE_MINUS_DST_ALPHA = 9, - GPU_CONSTANT_COLOR = 10, - GPU_ONE_MINUS_CONSTANT_COLOR = 11, - GPU_CONSTANT_ALPHA = 12, - GPU_ONE_MINUS_CONSTANT_ALPHA = 13, - GPU_SRC_ALPHA_SATURATE = 14, + GPU_ZERO = 0, ///< Zero. + GPU_ONE = 1, ///< One. + GPU_SRC_COLOR = 2, ///< Source color. + GPU_ONE_MINUS_SRC_COLOR = 3, ///< Source color - 1. + GPU_DST_COLOR = 4, ///< Destination color. + GPU_ONE_MINUS_DST_COLOR = 5, ///< Destination color - 1. + GPU_SRC_ALPHA = 6, ///< Source alpha. + GPU_ONE_MINUS_SRC_ALPHA = 7, ///< Source alpha - 1. + GPU_DST_ALPHA = 8, ///< Destination alpha. + GPU_ONE_MINUS_DST_ALPHA = 9, ///< Destination alpha - 1. + GPU_CONSTANT_COLOR = 10, ///< Constant color. + GPU_ONE_MINUS_CONSTANT_COLOR = 11, ///< Constant color - 1. + GPU_CONSTANT_ALPHA = 12, ///< Constant alpha. + GPU_ONE_MINUS_CONSTANT_ALPHA = 13, ///< Constant alpha - 1. + GPU_SRC_ALPHA_SATURATE = 14, ///< Saturated alpha. } GPU_BLENDFACTOR; +/// Logical operations. typedef enum { - GPU_LOGICOP_CLEAR = 0, - GPU_LOGICOP_AND = 1, - GPU_LOGICOP_AND_REVERSE = 2, - GPU_LOGICOP_COPY = 3, - GPU_LOGICOP_SET = 4, - GPU_LOGICOP_COPY_INVERTED = 5, - GPU_LOGICOP_NOOP = 6, - GPU_LOGICOP_INVERT = 7, - GPU_LOGICOP_NAND = 8, - GPU_LOGICOP_OR = 9, - GPU_LOGICOP_NOR = 10, - GPU_LOGICOP_XOR = 11, - GPU_LOGICOP_EQUIV = 12, - GPU_LOGICOP_AND_INVERTED = 13, - GPU_LOGICOP_OR_REVERSE = 14, - GPU_LOGICOP_OR_INVERTED = 15, + GPU_LOGICOP_CLEAR = 0, ///< Clear. + GPU_LOGICOP_AND = 1, ///< Bitwise AND. + GPU_LOGICOP_AND_REVERSE = 2, ///< Reverse bitwise AND. + GPU_LOGICOP_COPY = 3, ///< Copy. + GPU_LOGICOP_SET = 4, ///< Set. + GPU_LOGICOP_COPY_INVERTED = 5, ///< Inverted copy. + GPU_LOGICOP_NOOP = 6, ///< No operation. + GPU_LOGICOP_INVERT = 7, ///< Invert. + GPU_LOGICOP_NAND = 8, ///< Bitwise NAND. + GPU_LOGICOP_OR = 9, ///< Bitwise OR. + GPU_LOGICOP_NOR = 10, ///< Bitwise NOR. + GPU_LOGICOP_XOR = 11, ///< Bitwise XOR. + GPU_LOGICOP_EQUIV = 12, ///< Equivalent. + GPU_LOGICOP_AND_INVERTED = 13, ///< Inverted bitwise AND. + GPU_LOGICOP_OR_REVERSE = 14, ///< Reverse bitwise OR. + GPU_LOGICOP_OR_INVERTED = 15, ///< Inverted bitwize OR. } GPU_LOGICOP; +/// Supported component formats. typedef enum { - GPU_BYTE = 0, - GPU_UNSIGNED_BYTE = 1, - GPU_SHORT = 2, - GPU_FLOAT = 3, + GPU_BYTE = 0, ///< 8-bit byte. + GPU_UNSIGNED_BYTE = 1, ///< 8-bit unsigned byte. + GPU_SHORT = 2, ///< 16-bit short. + GPU_FLOAT = 3, ///< 32-bit float. } GPU_FORMATS; +/// Cull modes. typedef enum { - GPU_CULL_NONE = 0, - GPU_CULL_FRONT_CCW = 1, - GPU_CULL_BACK_CCW = 2, + GPU_CULL_NONE = 0, ///< Disabled. + GPU_CULL_FRONT_CCW = 1, ///< Front, counter-clockwise. + GPU_CULL_BACK_CCW = 2, ///< Back, counter-clockwise. } GPU_CULLMODE; +/// Creates a VBO attribute parameter from its index, size, and format. #define GPU_ATTRIBFMT(i, n, f) (((((n)-1)<<2)|((f)&3))<<((i)*4)) -/** -* Texture combiners sources -*/ +/// Texture combiner sources. typedef enum { - GPU_PRIMARY_COLOR = 0x00, - GPU_FRAGMENT_PRIMARY_COLOR = 0x01, - GPU_FRAGMENT_SECONDARY_COLOR = 0x02, - GPU_TEXTURE0 = 0x03, - GPU_TEXTURE1 = 0x04, - GPU_TEXTURE2 = 0x05, - GPU_TEXTURE3 = 0x06, - GPU_PREVIOUS_BUFFER = 0x0D, - GPU_CONSTANT = 0x0E, - GPU_PREVIOUS = 0x0F, + GPU_PRIMARY_COLOR = 0x00, ///< Primary color. + GPU_FRAGMENT_PRIMARY_COLOR = 0x01, ///< Primary fragment color. + GPU_FRAGMENT_SECONDARY_COLOR = 0x02, ///< Secondary fragment color. + GPU_TEXTURE0 = 0x03, ///< Texture unit 0. + GPU_TEXTURE1 = 0x04, ///< Texture unit 1. + GPU_TEXTURE2 = 0x05, ///< Texture unit 2. + GPU_TEXTURE3 = 0x06, ///< Texture unit 3. + GPU_PREVIOUS_BUFFER = 0x0D, ///< Previous buffer. + GPU_CONSTANT = 0x0E, ///< Constant value. + GPU_PREVIOUS = 0x0F, ///< Previous value. } GPU_TEVSRC; -/** -* Texture RGB combiners operands -*/ +/// Texture RGB combiner operands. typedef enum { - GPU_TEVOP_RGB_SRC_COLOR = 0x00, - GPU_TEVOP_RGB_ONE_MINUS_SRC_COLOR = 0x01, - GPU_TEVOP_RGB_SRC_ALPHA = 0x02, - GPU_TEVOP_RGB_ONE_MINUS_SRC_ALPHA = 0x03, - GPU_TEVOP_RGB_SRC_R = 0x04, - GPU_TEVOP_RGB_ONE_MINUS_SRC_R = 0x05, - GPU_TEVOP_RGB_0x06 = 0x06, - GPU_TEVOP_RGB_0x07 = 0x07, - GPU_TEVOP_RGB_SRC_G = 0x08, - GPU_TEVOP_RGB_ONE_MINUS_SRC_G = 0x09, - GPU_TEVOP_RGB_0x0A = 0x0A, - GPU_TEVOP_RGB_0x0B = 0x0B, - GPU_TEVOP_RGB_SRC_B = 0x0C, - GPU_TEVOP_RGB_ONE_MINUS_SRC_B = 0x0D, - GPU_TEVOP_RGB_0x0E = 0x0E, - GPU_TEVOP_RGB_0x0F = 0x0F, + GPU_TEVOP_RGB_SRC_COLOR = 0x00, ///< Source color. + GPU_TEVOP_RGB_ONE_MINUS_SRC_COLOR = 0x01, ///< Source color - 1. + GPU_TEVOP_RGB_SRC_ALPHA = 0x02, ///< Source alpha. + GPU_TEVOP_RGB_ONE_MINUS_SRC_ALPHA = 0x03, ///< Source alpha - 1. + GPU_TEVOP_RGB_SRC_R = 0x04, ///< Source red. + GPU_TEVOP_RGB_ONE_MINUS_SRC_R = 0x05, ///< Source red - 1. + GPU_TEVOP_RGB_0x06 = 0x06, ///< Unknown. + GPU_TEVOP_RGB_0x07 = 0x07, ///< Unknown. + GPU_TEVOP_RGB_SRC_G = 0x08, ///< Source green. + GPU_TEVOP_RGB_ONE_MINUS_SRC_G = 0x09, ///< Source green - 1. + GPU_TEVOP_RGB_0x0A = 0x0A, ///< Unknown. + GPU_TEVOP_RGB_0x0B = 0x0B, ///< Unknown. + GPU_TEVOP_RGB_SRC_B = 0x0C, ///< Source blue. + GPU_TEVOP_RGB_ONE_MINUS_SRC_B = 0x0D, ///< Source blue - 1. + GPU_TEVOP_RGB_0x0E = 0x0E, ///< Unknown. + GPU_TEVOP_RGB_0x0F = 0x0F, ///< Unknown. } GPU_TEVOP_RGB; - -/** -* Texture ALPHA combiners operands -*/ +/// Texture Alpha combiner operands. typedef enum { - GPU_TEVOP_A_SRC_ALPHA = 0x00, - GPU_TEVOP_A_ONE_MINUS_SRC_ALPHA = 0x01, - GPU_TEVOP_A_SRC_R = 0x02, - GPU_TEVOP_A_ONE_MINUS_SRC_R = 0x03, - GPU_TEVOP_A_SRC_G = 0x04, - GPU_TEVOP_A_ONE_MINUS_SRC_G = 0x05, - GPU_TEVOP_A_SRC_B = 0x06, - GPU_TEVOP_A_ONE_MINUS_SRC_B = 0x07, + GPU_TEVOP_A_SRC_ALPHA = 0x00, ///< Source alpha. + GPU_TEVOP_A_ONE_MINUS_SRC_ALPHA = 0x01, ///< Source alpha - 1. + GPU_TEVOP_A_SRC_R = 0x02, ///< Source red. + GPU_TEVOP_A_ONE_MINUS_SRC_R = 0x03, ///< Source red - 1. + GPU_TEVOP_A_SRC_G = 0x04, ///< Source green. + GPU_TEVOP_A_ONE_MINUS_SRC_G = 0x05, ///< Source green - 1. + GPU_TEVOP_A_SRC_B = 0x06, ///< Source blue. + GPU_TEVOP_A_ONE_MINUS_SRC_B = 0x07, ///< Source blue - 1. } GPU_TEVOP_A; -/** -* Texture combiner functions -*/ +/// Texture combiner functions. typedef enum { - GPU_REPLACE = 0x00, - GPU_MODULATE = 0x01, - GPU_ADD = 0x02, - GPU_ADD_SIGNED = 0x03, - GPU_INTERPOLATE = 0x04, - GPU_SUBTRACT = 0x05, - GPU_DOT3_RGB = 0x06, //RGB only - GPU_MULTIPLY_ADD = 0x08, - GPU_ADD_MULTIPLY = 0x09, + GPU_REPLACE = 0x00, ///< Replace. + GPU_MODULATE = 0x01, ///< Modulate. + GPU_ADD = 0x02, ///< Add. + GPU_ADD_SIGNED = 0x03, ///< Signed add. + GPU_INTERPOLATE = 0x04, ///< Interpolate. + GPU_SUBTRACT = 0x05, ///< Subtract. + GPU_DOT3_RGB = 0x06, ///< Dot3. RGB only. + GPU_MULTIPLY_ADD = 0x08, ///< Multiply then add. + GPU_ADD_MULTIPLY = 0x09, ///< Add then multiply. } GPU_COMBINEFUNC; -/** -* Texture scale factors -*/ +/// Texture scale factors. typedef enum { - GPU_TEVSCALE_1 = 0x0, - GPU_TEVSCALE_2 = 0x1, - GPU_TEVSCALE_4 = 0x2, + GPU_TEVSCALE_1 = 0x0, ///< 1x + GPU_TEVSCALE_2 = 0x1, ///< 2x + GPU_TEVSCALE_4 = 0x2, ///< 4x } GPU_TEVSCALE; +/// Creates a texture combiner source parameter from three sources. #define GPU_TEVSOURCES(a,b,c) (((a))|((b)<<4)|((c)<<8)) +/// Creates a texture combiner operand parameter from three operands. #define GPU_TEVOPERANDS(a,b,c) (((a))|((b)<<4)|((c)<<8)) +/// Creates a light environment layer configuration parameter. #define GPU_LIGHT_ENV_LAYER_CONFIG(n) ((n)+((n)==7)) +/// Creates a LC1 shadow bit parameter. #define GPU_LC1_SHADOWBIT(n) BIT(n) +/// Creates a LC1 spot bit parameter. #define GPU_LC1_SPOTBIT(n) BIT((n)+8) +/// Creates a LC1 LUT bit parameter. #define GPU_LC1_LUTBIT(n) BIT((n)+16) +/// Creates a LC1 attenuation bit parameter. #define GPU_LC1_ATTNBIT(n) BIT((n)+24) +/// Creates a light permutation parameter. #define GPU_LIGHTPERM(i,n) ((n) << (i)) +/// Creates a light LUT input parameter. #define GPU_LIGHTLUTINPUT(i,n) ((n) << ((i)*4)) +/// Creates a light LUT index parameter. #define GPU_LIGHTLUTIDX(c,i,o) ((o) | ((i) << 8) | ((c) << 11)) +/// Creates a light color parameter from red, green, and blue components. #define GPU_LIGHTCOLOR(r,g,b) (((b) & 0xFF) | (((g) << 10) & 0xFF) | (((r) << 20) & 0xFF)) +/// FRESNEL options. typedef enum { - GPU_NO_FRESNEL = 0, - GPU_PRI_ALPHA_FRESNEL = 1, - GPU_SEC_ALPHA_FRESNEL = 2, - GPU_PRI_SEC_ALPHA_FRESNEL = 3, + GPU_NO_FRESNEL = 0, ///< None. + GPU_PRI_ALPHA_FRESNEL = 1, ///< Primary alpha. + GPU_SEC_ALPHA_FRESNEL = 2, ///< Secondary alpha. + GPU_PRI_SEC_ALPHA_FRESNEL = 3, ///< Primary and secondary alpha. } GPU_FRESNELSEL; +/// Bump map modes. typedef enum { - GPU_BUMP_NOT_USED = 0, - GPU_BUMP_AS_BUMP = 1, - GPU_BUMP_AS_TANG = 2, + GPU_BUMP_NOT_USED = 0, ///< Disabled. + GPU_BUMP_AS_BUMP = 1, ///< Bump as bump. + GPU_BUMP_AS_TANG = 2, ///< Bump as tang. } GPU_BUMPMODE; +/// LUT IDs. typedef enum { - GPU_LUT_D0 = 0, - GPU_LUT_D1 = 1, - GPU_LUT_SP = 2, - GPU_LUT_FR = 3, - GPU_LUT_RB = 4, - GPU_LUT_RG = 5, - GPU_LUT_RR = 6, - GPU_LUT_DA = 7, + GPU_LUT_D0 = 0, ///< LUT D0. + GPU_LUT_D1 = 1, ///< LUT D1. + GPU_LUT_SP = 2, ///< LUT SP. + GPU_LUT_FR = 3, ///< LUT FR. + GPU_LUT_RB = 4, ///< LUT RB. + GPU_LUT_RG = 5, ///< LUT RG. + GPU_LUT_RR = 6, ///< LUT RR. + GPU_LUT_DA = 7, ///< LUT DA. } GPU_LIGHTLUTID; +/// LUT inputs. typedef enum { - GPU_LUTINPUT_NH = 0, - GPU_LUTINPUT_VH = 1, - GPU_LUTINPUT_NV = 2, - GPU_LUTINPUT_LN = 3, - GPU_LUTINPUT_SP = 4, - GPU_LUTINPUT_CP = 5, + GPU_LUTINPUT_NH = 0, ///< Input NH. + GPU_LUTINPUT_VH = 1, ///< Input VH. + GPU_LUTINPUT_NV = 2, ///< Input NV. + GPU_LUTINPUT_LN = 3, ///< Input LN. + GPU_LUTINPUT_SP = 4, ///< Input SP. + GPU_LUTINPUT_CP = 5, ///< Input CP. } GPU_LIGHTLUTINPUT; +/// LUT scalers. typedef enum { - GPU_LUTSCALER_1x = 0, - GPU_LUTSCALER_2x = 1, - GPU_LUTSCALER_4x = 2, - GPU_LUTSCALER_8x = 3, - GPU_LUTSCALER_0_25x = 6, - GPU_LUTSCALER_0_5x = 7, + GPU_LUTSCALER_1x = 0, ///< 1x scale. + GPU_LUTSCALER_2x = 1, ///< 2x scale. + GPU_LUTSCALER_4x = 2, ///< 4x scale. + GPU_LUTSCALER_8x = 3, ///< 8x scale. + GPU_LUTSCALER_0_25x = 6, ///< 0.25x scale. + GPU_LUTSCALER_0_5x = 7, ///< 0.5x scale. } GPU_LIGHTLUTSCALER; +/// LUT selection. typedef enum { - GPU_LUTSELECT_COMMON = 0, - GPU_LUTSELECT_SP = 1, - GPU_LUTSELECT_DA = 2, + GPU_LUTSELECT_COMMON = 0, ///< Common. + GPU_LUTSELECT_SP = 1, ///< SP. + GPU_LUTSELECT_DA = 2, ///< DA. } GPU_LIGHTLUTSELECT; +/// Supported primitives. typedef enum { - GPU_TRIANGLES = 0x0000, - GPU_TRIANGLE_STRIP = 0x0100, - GPU_TRIANGLE_FAN = 0x0200, - GPU_GEOMETRY_PRIM = 0x0300, + GPU_TRIANGLES = 0x0000, ///< Triangles. + GPU_TRIANGLE_STRIP = 0x0100, ///< Triangle strip. + GPU_TRIANGLE_FAN = 0x0200, ///< Triangle fan. + GPU_GEOMETRY_PRIM = 0x0300, ///< Geometry shader primitive. } GPU_Primitive_t; +/// Shader types. typedef enum { - GPU_VERTEX_SHADER = 0x0, - GPU_GEOMETRY_SHADER = 0x1, + GPU_VERTEX_SHADER = 0x0, ///< Vertex shader. + GPU_GEOMETRY_SHADER = 0x1, ///< Geometry shader. } GPU_SHADER_TYPE; diff --git a/libctru/include/3ds/gpu/gpu-old.h b/libctru/include/3ds/gpu/gpu-old.h index ba528e2..6fcee00 100644 --- a/libctru/include/3ds/gpu/gpu-old.h +++ b/libctru/include/3ds/gpu/gpu-old.h @@ -1,47 +1,209 @@ +/** + * @file gpu-old.h + * @brief Deprecated GPU functions. + * @deprecated + */ #pragma once #include "gpu.h" -//GPU +/** + * @brief Initializes the GPU. + * @param gsphandle GSP handle to use. + */ void GPU_Init(Handle *gsphandle) DEPRECATED; + +/** + * @brief Resets the GPU. + * @param gxbuf GX command buffer to use. + * @param gpuBuf GPU command buffer to use. + * @param gpuBufSize GPU command buffer size. + */ void GPU_Reset(u32* gxbuf, u32* gpuBuf, u32 gpuBufSize) DEPRECATED; +/** + * @brief Sets a shader float uniform. + * @param type Type of shader to set the uniform of. + * @param startreg Start of the uniform register to set. + * @param data Data to set. + * @param numreg Number of registers to set. + */ void GPU_SetFloatUniform(GPU_SHADER_TYPE type, u32 startreg, u32* data, u32 numreg) DEPRECATED; +/** + * @brief Sets the viewport. + * @param depthBuffer Buffer to output depth data to. + * @param colorBuffer Buffer to output color data to. + * @param x X of the viewport. + * @param y Y of the viewport. + * @param w Width of the viewport. + * @param h Height of the viewport. + */ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u32 h) DEPRECATED; +/** + * @brief Sets the current scissor test mode. + * @param mode Scissor test mode to use. + * @param x X of the scissor region. + * @param y Y of the scissor region. + * @param w Width of the scissor region. + * @param h Height of the scissor region. + */ void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h) DEPRECATED; +/** + * @brief Sets the depth map. + * @param zScale Z scale to use. + * @param zOffset Z offset to use. + */ void GPU_DepthMap(float zScale, float zOffset) DEPRECATED; + +/** + * @brief Sets the alpha test parameters. + * @param enable Whether to enable alpha testing. + * @param function Test function to use. + * @param ref Reference value to use. + */ void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref) DEPRECATED; -void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask) DEPRECATED; // GPU_WRITEMASK values can be ORed together + +/** + * @brief Sets the depth test parameters and pixel write mask. + * @note GPU_WRITEMASK values can be ORed together. + * @param enable Whether to enable depth testing. + * @param function Test function to use. + * @param writemask Pixel write mask to use. + */ +void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask) DEPRECATED; + +/** + * @brief Sets the stencil test parameters. + * @param enable Whether to enable stencil testing. + * @param function Test function to use. + * @param ref Reference value to use. + * @param input_mask Input mask to use. + * @param write_mask Write mask to use. + */ void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask) DEPRECATED; + +/** + * @brief Sets the stencil test operators. + * @param sfail Operator to use on source test failure. + * @param dfail Operator to use on destination test failure. + * @param pass Operator to use on test passing. + */ void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass) DEPRECATED; + +/** + * @brief Sets the face culling mode. + * @param mode Face culling mode to use. + */ void GPU_SetFaceCulling(GPU_CULLMODE mode) DEPRECATED; -// Only the first four tev stages can write to the combiner buffer, use GPU_TEV_BUFFER_WRITE_CONFIG to build the parameters + +/** + * @brief Sets the combiner buffer write parameters. + * @note Use GPU_TEV_BUFFER_WRITE_CONFIG to build the parameters. + * @note Only the first four TEV stages can write to the combiner buffer. + * @param rgb_config RGB configuration to use. + * @param alpha_config Alpha configuration to use. + */ void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config) DEPRECATED; -// these two can't be used together +/** + * @brief Sets the alpha blending parameters. + * @note Cannot be used with GPU_SetColorLogicOp. + * @param colorEquation Blend equation to use for color components. + * @param alphaEquation Blend equation to use for the alpha component. + * @param colorSrc Source factor of color components. + * @param colorDst Destination factor of color components. + * @param alphaSrc Source factor of the alpha component. + * @param alphaDst Destination factor of the alpha component. + */ void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alphaEquation, GPU_BLENDFACTOR colorSrc, GPU_BLENDFACTOR colorDst, GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst) DEPRECATED; + +/** + * @brief Sets the color logic operator. + * @note Cannot be used with GPU_SetAlphaBlending. + * @param op Operator to set. + */ void GPU_SetColorLogicOp(GPU_LOGICOP op) DEPRECATED; +/** + * @brief Sets the blending color. + * @param r Red component. + * @param g Green component. + * @param b Blue component. + * @param a Alpha component. + */ void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a) DEPRECATED; +/** + * @brief Sets the VBO attribute buffers. + * @param totalAttributes Total number of attributes. + * @param baseAddress Base address of the VBO. + * @param attributeFormats Attribute format data. + * @param attributeMask Attribute mask. + * @param attributePermutation Attribute permutations. + * @param numBuffers Number of buffers. + * @param bufferOffsets Offsets of the buffers. + * @param bufferPermutations Buffer permutations. + * @param bufferNumAttributes Numbers of attributes of the buffers. + */ void GPU_SetAttributeBuffers(u8 totalAttributes, u32* baseAddress, u64 attributeFormats, u16 attributeMask, u64 attributePermutation, u8 numBuffers, u32 bufferOffsets[], u64 bufferPermutations[], u8 bufferNumAttributes[]) DEPRECATED; -void GPU_SetTextureEnable(GPU_TEXUNIT units) DEPRECATED; // GPU_TEXUNITx values can be ORed together to enable multiple texture units - +/** + * @brief Sets the enabled texture units. + * @param units Units to enable. OR texture unit values together to create this value. + */ +void GPU_SetTextureEnable(GPU_TEXUNIT units) DEPRECATED; +/** + * @brief Sets the texture data of a texture unit. + * @param unit Texture unit to use. + * @param data Data to load. Must be in linear memory or VRAM. + * @param width Width of the texture. + * @param height Height of the texture. + * @param Parameters of the texture, such as filters and wrap modes. + * @param colorType Color type of the texture. + */ void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType) DEPRECATED; /** - * @param borderColor The color used for the border when using the @ref GPU_CLAMP_TO_BORDER wrap mode + * @brief Sets the border color of a texture unit. + * @param unit Texture unit to use. + * @param borderColor The color used for the border when using the @ref GPU_CLAMP_TO_BORDER wrap mode. */ void GPU_SetTextureBorderColor(GPU_TEXUNIT unit,u32 borderColor) DEPRECATED; + +/** + * @brief Sets the parameters of a texture combiner. + * @param id ID of the combiner. + * @param rgbSources RGB source configuration. + * @param alphaSources Alpha source configuration. + * @param rgbOperands RGB operand configuration. + * @param alphaOperands Alpha operand configuration. + * @param rgbCombine RGB combiner function. + * @param alphaCombine Alpha combiner function. + * @param constantColor Constant color to provide. + */ void GPU_SetTexEnv(u8 id, u16 rgbSources, u16 alphaSources, u16 rgbOperands, u16 alphaOperands, GPU_COMBINEFUNC rgbCombine, GPU_COMBINEFUNC alphaCombine, u32 constantColor) DEPRECATED; +/** + * @brief Draws an array of vertex data. + * @param primitive Primitive to draw. + * @param first First vertex to draw. + * @param count Number of vertices to draw. + */ void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count) DEPRECATED; + +/** + * @brief Draws vertex elements. + * @param primitive Primitive to draw. + * @param indexArray Array of vertex indices to use. + * @param n Number of vertices to draw. + */ void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n) DEPRECATED; + +/// Finishes drawing. void GPU_FinishDrawing() DEPRECATED; diff --git a/libctru/include/3ds/gpu/gpu.h b/libctru/include/3ds/gpu/gpu.h index 9403a17..d854848 100644 --- a/libctru/include/3ds/gpu/gpu.h +++ b/libctru/include/3ds/gpu/gpu.h @@ -1,34 +1,105 @@ +/** + * @file gpu.h + * @brief Barebones GPU communications driver. + */ #pragma once #include "registers.h" #include "enums.h" -//GPUCMD +/// Creates a GPU command header from its write increments, mask, and register. #define GPUCMD_HEADER(incremental, mask, reg) (((incremental)<<31)|(((mask)&0xF)<<16)|((reg)&0x3FF)) -extern u32* gpuCmdBuf; -extern u32 gpuCmdBufSize; -extern u32 gpuCmdBufOffset; +extern u32* gpuCmdBuf; ///< GPU command buffer. +extern u32 gpuCmdBufSize; ///< GPU command buffer size. +extern u32 gpuCmdBufOffset; ///< GPU command buffer offset. +/** + * @brief Sets the GPU command buffer to use. + * @param adr Pointer to the command buffer. + * @param size Size of the command buffer. + * @param offset Offset of the command buffer. + */ void GPUCMD_SetBuffer(u32* adr, u32 size, u32 offset); + +/** + * @brief Sets the offset of the GPU command buffer. + * @param offset Offset of the command buffer. + */ void GPUCMD_SetBufferOffset(u32 offset); + +/** + * @brief Gets the current GPU command buffer. + * @param adr Pointer to output the command buffer to. + * @param size Pointer to output the size of the command buffer to. + * @param offset Pointer to output the offset of the command buffer to. + */ void GPUCMD_GetBuffer(u32** adr, u32* size, u32* offset); + +/** + * @brief Adds raw GPU commands to the current command buffer. + * @param cmd Buffer containing commands to add. + * @param size Size of the buffer. + */ void GPUCMD_AddRawCommands(u32* cmd, u32 size); + +/// Executes the GPU command buffer. void GPUCMD_Run(void); + +/// Flushes linear memory and executes the GPU command buffer. void GPUCMD_FlushAndRun(void); + +/** + * @brief Adds a GPU command to the current command buffer. + * @param header Header of the command. + * @param param Parameters of the command. + * @param paramlength Size of the parameter buffer. + */ void GPUCMD_Add(u32 header, u32* param, u32 paramlength); + +/// Finalizes the GPU command buffer. void GPUCMD_Finalize(void); +/** + * @brief Converts a 32-bit float to a 16-bit float. + * @param f Float to convert. + * @return The converted float. + */ u32 f32tof16(float f); + +/** + * @brief Converts a 32-bit float to a 20-bit float. + * @param f Float to convert. + * @return The converted float. + */ u32 f32tof20(float f); + +/** + * @brief Converts a 32-bit float to a 24-bit float. + * @param f Float to convert. + * @return The converted float. + */ u32 f32tof24(float f); + +/** + * @brief Converts a 32-bit float to a 31-bit float. + * @param f Float to convert. + * @return The converted float. + */ u32 f32tof31(float f); +/// Adds a command with a single parameter to the current command buffer. #define GPUCMD_AddSingleParam(header, param) GPUCMD_Add((header), (u32[]){(u32)(param)}, 1) +/// Adds a masked register write to the current command buffer. #define GPUCMD_AddMaskedWrite(reg, mask, val) GPUCMD_AddSingleParam(GPUCMD_HEADER(0, (mask), (reg)), (val)) +/// Adds a register write to the current command buffer. #define GPUCMD_AddWrite(reg, val) GPUCMD_AddMaskedWrite((reg), 0xF, (val)) +/// Adds multiple masked register writes to the current command buffer. #define GPUCMD_AddMaskedWrites(reg, mask, vals, num) GPUCMD_Add(GPUCMD_HEADER(0, (mask), (reg)), (vals), (num)) +/// Adds multiple register writes to the current command buffer. #define GPUCMD_AddWrites(reg, vals, num) GPUCMD_AddMaskedWrites((reg), 0xF, (vals), (num)) +/// Adds multiple masked incremental register writes to the current command buffer. #define GPUCMD_AddMaskedIncrementalWrites(reg, mask, vals, num) GPUCMD_Add(GPUCMD_HEADER(1, (mask), (reg)), (vals), (num)) +/// Adds multiple incremental register writes to the current command buffer. #define GPUCMD_AddIncrementalWrites(reg, vals, num) GPUCMD_AddMaskedIncrementalWrites((reg), 0xF, (vals), (num)) diff --git a/libctru/include/3ds/gpu/gx.h b/libctru/include/3ds/gpu/gx.h index 8f059b0..0beae7f 100644 --- a/libctru/include/3ds/gpu/gx.h +++ b/libctru/include/3ds/gpu/gx.h @@ -1,22 +1,23 @@ /** * @file gx.h + * @brief GX commands. */ - #pragma once +/// Creates a buffer dimension parameter from width and height values. #define GX_BUFFER_DIM(w, h) (((h)<<16)|((w)&0xFFFF)) /** - * @brief Pixel formats + * @brief Supported transfer pixel formats. * @sa GSP_FramebufferFormats */ typedef enum { - GX_TRANSFER_FMT_RGBA8 = 0, - GX_TRANSFER_FMT_RGB8 = 1, - GX_TRANSFER_FMT_RGB565 = 2, - GX_TRANSFER_FMT_RGB5A1 = 3, - GX_TRANSFER_FMT_RGBA4 = 4 + GX_TRANSFER_FMT_RGBA8 = 0, ///< 8-bit Red + 8-bit Green + 8-bit Blue + 8-bit Alpha + GX_TRANSFER_FMT_RGB8 = 1, ///< 8-bit Red + 8-bit Green + 8-bit Blue + GX_TRANSFER_FMT_RGB565 = 2, ///< 5-bit Red + 6-bit Green + 5-bit Blue + GX_TRANSFER_FMT_RGB5A1 = 3, ///< 5-bit Red + 5-bit Green + 5-bit Blue + 1-bit Alpha + GX_TRANSFER_FMT_RGBA4 = 4 ///< 4-bit Red + 4-bit Green + 4-bit Blue + 4-bit Alpha } GX_TRANSFER_FORMAT; /** @@ -42,21 +43,85 @@ typedef enum GX_FILL_32BIT_DEPTH = 0x200, ///< The buffer has a 32 bit per pixel depth } GX_FILL_CONTROL; +/// Creates a transfer vertical flip flag. #define GX_TRANSFER_FLIP_VERT(x) ((x)<<0) +/// Creates a transfer tiled output flag. #define GX_TRANSFER_OUT_TILED(x) ((x)<<1) +/// Creates a transfer raw copy flag. #define GX_TRANSFER_RAW_COPY(x) ((x)<<3) +/// Creates a transfer input format flag. #define GX_TRANSFER_IN_FORMAT(x) ((x)<<8) +/// Creates a transfer output format flag. #define GX_TRANSFER_OUT_FORMAT(x) ((x)<<12) +/// Creates a transfer scaling flag. #define GX_TRANSFER_SCALING(x) ((x)<<24) +/// Command list flag bit 0. #define GX_CMDLIST_BIT0 BIT(0) +/// Flushes the command list. #define GX_CMDLIST_FLUSH BIT(1) -Result GX_RequestDma(u32* src, u32* dst, u32 length); -Result GX_ProcessCommandList(u32* buf0a, u32 buf0s, u8 flags); -Result GX_MemoryFill(u32* buf0a, u32 buf0v, u32* buf0e, u16 control0, u32* buf1a, u32 buf1v, u32* buf1e, u16 control1); -Result GX_DisplayTransfer(u32* inadr, u32 indim, u32* outadr, u32 outdim, u32 flags); -Result GX_TextureCopy(u32* inadr, u32 indim, u32* outadr, u32 outdim, u32 size, u32 flags); -Result GX_FlushCacheRegions(u32* buf0a, u32 buf0s, u32* buf1a, u32 buf1s, u32* buf2a, u32 buf2s); +extern u32* gxCmdBuf; ///< GX command buffer. -extern u32* gxCmdBuf; +/** + * @brief Requests a DMA. + * @param src Source to DMA from. + * @param dst Destination to DMA to. + * @param length Length of data to transfer. + */ +Result GX_RequestDma(u32* src, u32* dst, u32 length); + +/** + * @brief Processes a GPU command list. + * @param buf0a Command list address. + * @param buf0s Command list size. + * @param flags Flags to process with. + */ +Result GX_ProcessCommandList(u32* buf0a, u32 buf0s, u8 flags); + +/** + * @brief Fills the memory of two buffers with the given values. + * @param buf0a Start address of the first buffer. + * @param buf0v Dimensions of the first buffer. + * @param buf0e End address of the first buffer. + * @param control0 Value to fill the first buffer with. + * @param buf1a Start address of the second buffer. + * @param buf1v Dimensions of the second buffer. + * @param buf1e End address of the second buffer. + * @param control1 Value to fill the second buffer with. + */ +Result GX_MemoryFill(u32* buf0a, u32 buf0v, u32* buf0e, u16 control0, u32* buf1a, u32 buf1v, u32* buf1e, u16 control1); + +/** + * @brief Initiates a display transfer. + * @note The PPF event will be signaled on completion. + * @param inadr Address of the input. + * @param indim Dimensions of the input. + * @param outadr Address of the output. + * @param outdim Dimensions of the output. + * @param flags Flags to transfer with. + */ +Result GX_DisplayTransfer(u32* inadr, u32 indim, u32* outadr, u32 outdim, u32 flags); + +/** + * @brief Initiates a texture copy. + * @note The PPF event will be signaled on completion. + * @param inadr Address of the input. + * @param indim Dimensions of the input. + * @param outadr Address of the output. + * @param outdim Dimensions of the output. + * @param size Size of the data to transfer. + * @param flags Flags to transfer with. + */ +Result GX_TextureCopy(u32* inadr, u32 indim, u32* outadr, u32 outdim, u32 size, u32 flags); + +/** + * @brief Flushes the cache regions of three buffers. + * @param buf0a Address of the first buffer. + * @param buf0s Size of the first buffer. + * @param buf1a Address of the second buffer. + * @param buf1s Size of the second buffer. + * @param buf2a Address of the third buffer. + * @param buf2s Size of the third buffer. + */ +Result GX_FlushCacheRegions(u32* buf0a, u32 buf0s, u32* buf1a, u32 buf1s, u32* buf2a, u32 buf2s); diff --git a/libctru/include/3ds/gpu/registers.h b/libctru/include/3ds/gpu/registers.h index 88943ba..9a61a79 100644 --- a/libctru/include/3ds/gpu/registers.h +++ b/libctru/include/3ds/gpu/registers.h @@ -1,770 +1,767 @@ +/** + * @file registers.h + * @param GPU registers. + */ #pragma once -//----------------------------------------------------------------------------- -// Miscellaneous registers (0x000-0x03F) -//----------------------------------------------------------------------------- +///@name Miscellaneous registers (0x000-0x03F) +///@{ +#define GPUREG_0000 0x0000 ///< Unknown. +#define GPUREG_0001 0x0001 ///< Unknown. +#define GPUREG_0002 0x0002 ///< Unknown. +#define GPUREG_0003 0x0003 ///< Unknown. +#define GPUREG_0004 0x0004 ///< Unknown. +#define GPUREG_0005 0x0005 ///< Unknown. +#define GPUREG_0006 0x0006 ///< Unknown. +#define GPUREG_0007 0x0007 ///< Unknown. +#define GPUREG_0008 0x0008 ///< Unknown. +#define GPUREG_0009 0x0009 ///< Unknown. +#define GPUREG_000A 0x000A ///< Unknown. +#define GPUREG_000B 0x000B ///< Unknown. +#define GPUREG_000C 0x000C ///< Unknown. +#define GPUREG_000D 0x000D ///< Unknown. +#define GPUREG_000E 0x000E ///< Unknown. +#define GPUREG_000F 0x000F ///< Unknown. +#define GPUREG_FINALIZE 0x0010 ///< Used to finalize GPU drawing. +#define GPUREG_0011 0x0011 ///< Unknown. +#define GPUREG_0012 0x0012 ///< Unknown. +#define GPUREG_0013 0x0013 ///< Unknown. +#define GPUREG_0014 0x0014 ///< Unknown. +#define GPUREG_0015 0x0015 ///< Unknown. +#define GPUREG_0016 0x0016 ///< Unknown. +#define GPUREG_0017 0x0017 ///< Unknown. +#define GPUREG_0018 0x0018 ///< Unknown. +#define GPUREG_0019 0x0019 ///< Unknown. +#define GPUREG_001A 0x001A ///< Unknown. +#define GPUREG_001B 0x001B ///< Unknown. +#define GPUREG_001C 0x001C ///< Unknown. +#define GPUREG_001D 0x001D ///< Unknown. +#define GPUREG_001E 0x001E ///< Unknown. +#define GPUREG_001F 0x001F ///< Unknown. +#define GPUREG_0020 0x0020 ///< Unknown. +#define GPUREG_0021 0x0021 ///< Unknown. +#define GPUREG_0022 0x0022 ///< Unknown. +#define GPUREG_0023 0x0023 ///< Unknown. +#define GPUREG_0024 0x0024 ///< Unknown. +#define GPUREG_0025 0x0025 ///< Unknown. +#define GPUREG_0026 0x0026 ///< Unknown. +#define GPUREG_0027 0x0027 ///< Unknown. +#define GPUREG_0028 0x0028 ///< Unknown. +#define GPUREG_0029 0x0029 ///< Unknown. +#define GPUREG_002A 0x002A ///< Unknown. +#define GPUREG_002B 0x002B ///< Unknown. +#define GPUREG_002C 0x002C ///< Unknown. +#define GPUREG_002D 0x002D ///< Unknown. +#define GPUREG_002E 0x002E ///< Unknown. +#define GPUREG_002F 0x002F ///< Unknown. +#define GPUREG_0030 0x0030 ///< Unknown. +#define GPUREG_0031 0x0031 ///< Unknown. +#define GPUREG_0032 0x0032 ///< Unknown. +#define GPUREG_0033 0x0033 ///< Unknown. +#define GPUREG_0034 0x0034 ///< Unknown. +#define GPUREG_0035 0x0035 ///< Unknown. +#define GPUREG_0036 0x0036 ///< Unknown. +#define GPUREG_0037 0x0037 ///< Unknown. +#define GPUREG_0038 0x0038 ///< Unknown. +#define GPUREG_0039 0x0039 ///< Unknown. +#define GPUREG_003A 0x003A ///< Unknown. +#define GPUREG_003B 0x003B ///< Unknown. +#define GPUREG_003C 0x003C ///< Unknown. +#define GPUREG_003D 0x003D ///< Unknown. +#define GPUREG_003E 0x003E ///< Unknown. +#define GPUREG_003F 0x003F ///< Unknown. +///@} -#define GPUREG_0000 0x0000 -#define GPUREG_0001 0x0001 -#define GPUREG_0002 0x0002 -#define GPUREG_0003 0x0003 -#define GPUREG_0004 0x0004 -#define GPUREG_0005 0x0005 -#define GPUREG_0006 0x0006 -#define GPUREG_0007 0x0007 -#define GPUREG_0008 0x0008 -#define GPUREG_0009 0x0009 -#define GPUREG_000A 0x000A -#define GPUREG_000B 0x000B -#define GPUREG_000C 0x000C -#define GPUREG_000D 0x000D -#define GPUREG_000E 0x000E -#define GPUREG_000F 0x000F -#define GPUREG_FINALIZE 0x0010 -#define GPUREG_0011 0x0011 -#define GPUREG_0012 0x0012 -#define GPUREG_0013 0x0013 -#define GPUREG_0014 0x0014 -#define GPUREG_0015 0x0015 -#define GPUREG_0016 0x0016 -#define GPUREG_0017 0x0017 -#define GPUREG_0018 0x0018 -#define GPUREG_0019 0x0019 -#define GPUREG_001A 0x001A -#define GPUREG_001B 0x001B -#define GPUREG_001C 0x001C -#define GPUREG_001D 0x001D -#define GPUREG_001E 0x001E -#define GPUREG_001F 0x001F -#define GPUREG_0020 0x0020 -#define GPUREG_0021 0x0021 -#define GPUREG_0022 0x0022 -#define GPUREG_0023 0x0023 -#define GPUREG_0024 0x0024 -#define GPUREG_0025 0x0025 -#define GPUREG_0026 0x0026 -#define GPUREG_0027 0x0027 -#define GPUREG_0028 0x0028 -#define GPUREG_0029 0x0029 -#define GPUREG_002A 0x002A -#define GPUREG_002B 0x002B -#define GPUREG_002C 0x002C -#define GPUREG_002D 0x002D -#define GPUREG_002E 0x002E -#define GPUREG_002F 0x002F -#define GPUREG_0030 0x0030 -#define GPUREG_0031 0x0031 -#define GPUREG_0032 0x0032 -#define GPUREG_0033 0x0033 -#define GPUREG_0034 0x0034 -#define GPUREG_0035 0x0035 -#define GPUREG_0036 0x0036 -#define GPUREG_0037 0x0037 -#define GPUREG_0038 0x0038 -#define GPUREG_0039 0x0039 -#define GPUREG_003A 0x003A -#define GPUREG_003B 0x003B -#define GPUREG_003C 0x003C -#define GPUREG_003D 0x003D -#define GPUREG_003E 0x003E -#define GPUREG_003F 0x003F +///@name Rasterizer registers (0x040-0x07F) +///@{ +#define GPUREG_FACECULLING_CONFIG 0x0040 ///< Face culling configuration. +#define GPUREG_VIEWPORT_WIDTH 0x0041 ///< Viewport width. +#define GPUREG_VIEWPORT_INVW 0x0042 ///< Inverted viewport width. +#define GPUREG_VIEWPORT_HEIGHT 0x0043 ///< Viewport height. +#define GPUREG_VIEWPORT_INVH 0x0044 ///< Inverted viewport height. +#define GPUREG_0045 0x0045 ///< Unknown +#define GPUREG_0046 0x0046 ///< Unknown +#define GPUREG_0047 0x0047 ///< Unknown +#define GPUREG_0048 0x0048 ///< Unknown +#define GPUREG_0049 0x0049 ///< Unknown +#define GPUREG_004A 0x004A ///< Unknown +#define GPUREG_004B 0x004B ///< Unknown +#define GPUREG_004C 0x004C ///< Unknown +#define GPUREG_DEPTHMAP_SCALE 0x004D ///< Depth map scale. +#define GPUREG_DEPTHMAP_OFFSET 0x004E ///< Depth map offset. +#define GPUREG_SH_OUTMAP_TOTAL 0x004F ///< Shader output map total. +#define GPUREG_SH_OUTMAP_O0 0x0050 ///< Shader output map 0. +#define GPUREG_SH_OUTMAP_O1 0x0051 ///< Shader output map 1. +#define GPUREG_SH_OUTMAP_O2 0x0052 ///< Shader output map 2. +#define GPUREG_SH_OUTMAP_O3 0x0053 ///< Shader output map 3. +#define GPUREG_SH_OUTMAP_O4 0x0054 ///< Shader output map 4. +#define GPUREG_SH_OUTMAP_O5 0x0055 ///< Shader output map 5. +#define GPUREG_SH_OUTMAP_O6 0x0056 ///< Shader output map 6. +#define GPUREG_0057 0x0057 ///< Unknown +#define GPUREG_0058 0x0058 ///< Unknown +#define GPUREG_0059 0x0059 ///< Unknown +#define GPUREG_005A 0x005A ///< Unknown +#define GPUREG_005B 0x005B ///< Unknown +#define GPUREG_005C 0x005C ///< Unknown +#define GPUREG_005D 0x005D ///< Unknown +#define GPUREG_005E 0x005E ///< Unknown +#define GPUREG_005F 0x005F ///< Unknown +#define GPUREG_0060 0x0060 ///< Unknown +#define GPUREG_0061 0x0061 ///< Unknown +#define GPUREG_0062 0x0062 ///< Unknown +#define GPUREG_0063 0x0063 ///< Unknown +#define GPUREG_0064 0x0064 ///< Unknown +#define GPUREG_SCISSORTEST_MODE 0x0065 ///< Scissor test mode. +#define GPUREG_SCISSORTEST_POS 0x0066 ///< Scissor test position. +#define GPUREG_SCISSORTEST_DIM 0x0067 ///< Scissor text dimensions. +#define GPUREG_VIEWPORT_XY 0x0068 ///< Viewport X and Y. +#define GPUREG_0069 0x0069 ///< Unknown +#define GPUREG_006A 0x006A ///< Unknown +#define GPUREG_006B 0x006B ///< Unknown +#define GPUREG_006C 0x006C ///< Unknown +#define GPUREG_006D 0x006D ///< Unknown +#define GPUREG_FRAMEBUFFER_DIM2 0x006E ///< Framebuffer dimensions. +#define GPUREG_006F 0x006F ///< Unknown +#define GPUREG_0070 0x0070 ///< Unknown +#define GPUREG_0071 0x0071 ///< Unknown +#define GPUREG_0072 0x0072 ///< Unknown +#define GPUREG_0073 0x0073 ///< Unknown +#define GPUREG_0074 0x0074 ///< Unknown +#define GPUREG_0075 0x0075 ///< Unknown +#define GPUREG_0076 0x0076 ///< Unknown +#define GPUREG_0077 0x0077 ///< Unknown +#define GPUREG_0078 0x0078 ///< Unknown +#define GPUREG_0079 0x0079 ///< Unknown +#define GPUREG_007A 0x007A ///< Unknown +#define GPUREG_007B 0x007B ///< Unknown +#define GPUREG_007C 0x007C ///< Unknown +#define GPUREG_007D 0x007D ///< Unknown +#define GPUREG_007E 0x007E ///< Unknown +#define GPUREG_007F 0x007F ///< Unknown +///@} -//----------------------------------------------------------------------------- -// Rasterizer registers (0x040-0x07F) -//----------------------------------------------------------------------------- +///@name Texturing registers (0x080-0x0FF) +///@{ +#define GPUREG_TEXUNIT_ENABLE 0x0080 ///< Enabled texture units. +#define GPUREG_TEXUNIT0_BORDER_COLOR 0x0081 ///< Texture unit 0 border color. +#define GPUREG_TEXUNIT0_DIM 0x0082 ///< Texture unit 0 dimensions. +#define GPUREG_TEXUNIT0_PARAM 0x0083 ///< Texture unit 0 parameters. +#define GPUREG_0084 0x0084 ///< Unknown. +#define GPUREG_TEXUNIT0_LOC 0x0085 ///< Texture unit 0 address. +#define GPUREG_0086 0x0086 ///< Unknown. +#define GPUREG_0087 0x0087 ///< Unknown. +#define GPUREG_0088 0x0088 ///< Unknown. +#define GPUREG_0089 0x0089 ///< Unknown. +#define GPUREG_008A 0x008A ///< Unknown. +#define GPUREG_008B 0x008B ///< Unknown. +#define GPUREG_008C 0x008C ///< Unknown. +#define GPUREG_008D 0x008D ///< Unknown. +#define GPUREG_TEXUNIT0_TYPE 0x008E ///< Texture unit 0 type. +#define GPUREG_LIGHTING_ENABLE0 0x008F ///< Lighting toggle. +#define GPUREG_0090 0x0090 ///< Unknown. +#define GPUREG_TEXUNIT1_BORDER_COLOR 0x0091 ///< Texture unit 1 border color. +#define GPUREG_TEXUNIT1_DIM 0x0092 ///< Texture unit 1 dimensions. +#define GPUREG_TEXUNIT1_PARAM 0x0093 ///< Texture unit 1 parameters. +#define GPUREG_0094 0x0094 ///< Unknown. +#define GPUREG_TEXUNIT1_LOC 0x0095 ///< Texture unit 1 address. +#define GPUREG_TEXUNIT1_TYPE 0x0096 ///< Texture unit 1 type. +#define GPUREG_0097 0x0097 ///< Unknown. +#define GPUREG_0098 0x0098 ///< Unknown. +#define GPUREG_TEXUNIT2_BORDER_COLOR 0x0099 ///< Texture unit 2 border color. +#define GPUREG_TEXUNIT2_DIM 0x009A ///< Texture unit 2 dimensions. +#define GPUREG_TEXUNIT2_PARAM 0x009B ///< Texture unit 2 parameters. +#define GPUREG_009C 0x009C ///< Unknown. +#define GPUREG_TEXUNIT2_LOC 0x009D ///< Texture unit 2 location. +#define GPUREG_TEXUNIT2_TYPE 0x009E ///< Texture unit 2 type. +#define GPUREG_009F 0x009F ///< Unknown. +#define GPUREG_00A0 0x00A0 ///< Unknown. +#define GPUREG_00A1 0x00A1 ///< Unknown. +#define GPUREG_00A2 0x00A2 ///< Unknown. +#define GPUREG_00A3 0x00A3 ///< Unknown. +#define GPUREG_00A4 0x00A4 ///< Unknown. +#define GPUREG_00A5 0x00A5 ///< Unknown. +#define GPUREG_00A6 0x00A6 ///< Unknown. +#define GPUREG_00A7 0x00A7 ///< Unknown. +#define GPUREG_00A8 0x00A8 ///< Unknown. +#define GPUREG_00A9 0x00A9 ///< Unknown. +#define GPUREG_00AA 0x00AA ///< Unknown. +#define GPUREG_00AB 0x00AB ///< Unknown. +#define GPUREG_00AC 0x00AC ///< Unknown. +#define GPUREG_00AD 0x00AD ///< Unknown. +#define GPUREG_00AE 0x00AE ///< Unknown. +#define GPUREG_00AF 0x00AF ///< Unknown. +#define GPUREG_00B0 0x00B0 ///< Unknown. +#define GPUREG_00B1 0x00B1 ///< Unknown. +#define GPUREG_00B2 0x00B2 ///< Unknown. +#define GPUREG_00B3 0x00B3 ///< Unknown. +#define GPUREG_00B4 0x00B4 ///< Unknown. +#define GPUREG_00B5 0x00B5 ///< Unknown. +#define GPUREG_00B6 0x00B6 ///< Unknown. +#define GPUREG_00B7 0x00B7 ///< Unknown. +#define GPUREG_00B8 0x00B8 ///< Unknown. +#define GPUREG_00B9 0x00B9 ///< Unknown. +#define GPUREG_00BA 0x00BA ///< Unknown. +#define GPUREG_00BB 0x00BB ///< Unknown. +#define GPUREG_00BC 0x00BC ///< Unknown. +#define GPUREG_00BD 0x00BD ///< Unknown. +#define GPUREG_00BE 0x00BE ///< Unknown. +#define GPUREG_00BF 0x00BF ///< Unknown. +#define GPUREG_TEXENV0_SOURCE 0x00C0 ///< Texture env 0 source. +#define GPUREG_TEXENV0_OPERAND 0x00C1 ///< Texture env 0 operand. +#define GPUREG_TEXENV0_COMBINER 0x00C2 ///< Texture env 0 combiner. +#define GPUREG_TEXENV0_COLOR 0x00C3 ///< Texture env 0 color. +#define GPUREG_TEXENV0_SCALE 0x00C4 ///< Texture env 0 scale. +#define GPUREG_00C5 0x00C5 ///< Unknown. +#define GPUREG_00C6 0x00C6 ///< Unknown. +#define GPUREG_00C7 0x00C7 ///< Unknown. +#define GPUREG_TEXENV1_SOURCE 0x00C8 ///< Texture env 1 source. +#define GPUREG_TEXENV1_OPERAND 0x00C9 ///< Texture env 1 operand. +#define GPUREG_TEXENV1_COMBINER 0x00CA ///< Texture env 1 combiner. +#define GPUREG_TEXENV1_COLOR 0x00CB ///< Texture env 1 color. +#define GPUREG_TEXENV1_SCALE 0x00CC ///< Texture env 1 scale. +#define GPUREG_00CD 0x00CD ///< Unknown. +#define GPUREG_00CE 0x00CE ///< Unknown. +#define GPUREG_00CF 0x00CF ///< Unknown. +#define GPUREG_TEXENV2_SOURCE 0x00D0 ///< Texture env 2 source. +#define GPUREG_TEXENV2_OPERAND 0x00D1 ///< Texture env 2 operand. +#define GPUREG_TEXENV2_COMBINER 0x00D2 ///< Texture env 2 combiner. +#define GPUREG_TEXENV2_COLOR 0x00D3 ///< Texture env 2 color. +#define GPUREG_TEXENV2_SCALE 0x00D4 ///< Texture env 2 scale. +#define GPUREG_00D5 0x00D5 ///< Unknown. +#define GPUREG_00D6 0x00D6 ///< Unknown. +#define GPUREG_00D7 0x00D7 ///< Unknown. +#define GPUREG_TEXENV3_SOURCE 0x00D8 ///< Texture env 3 source. +#define GPUREG_TEXENV3_OPERAND 0x00D9 ///< Texture env 3 operand. +#define GPUREG_TEXENV3_COMBINER 0x00DA ///< Texture env 3 combiner. +#define GPUREG_TEXENV3_COLOR 0x00DB ///< Texture env 3 color. +#define GPUREG_TEXENV3_SCALE 0x00DC ///< Texture env 3 scale. +#define GPUREG_00DD 0x00DD ///< Unknown. +#define GPUREG_00DE 0x00DE ///< Unknown. +#define GPUREG_00DF 0x00DF ///< Unknown. +#define GPUREG_TEXENV_UPDATE_BUFFER 0x00E0 ///< Texture env buffer update flag. +#define GPUREG_00E1 0x00E1 ///< Unknown. +#define GPUREG_00E2 0x00E2 ///< Unknown. +#define GPUREG_00E3 0x00E3 ///< Unknown. +#define GPUREG_00E4 0x00E4 ///< Unknown. +#define GPUREG_00E5 0x00E5 ///< Unknown. +#define GPUREG_00E6 0x00E6 ///< Unknown. +#define GPUREG_00E7 0x00E7 ///< Unknown. +#define GPUREG_00E8 0x00E8 ///< Unknown. +#define GPUREG_00E9 0x00E9 ///< Unknown. +#define GPUREG_00EA 0x00EA ///< Unknown. +#define GPUREG_00EB 0x00EB ///< Unknown. +#define GPUREG_00EC 0x00EC ///< Unknown. +#define GPUREG_00ED 0x00ED ///< Unknown. +#define GPUREG_00EE 0x00EE ///< Unknown. +#define GPUREG_00EF 0x00EF ///< Unknown. +#define GPUREG_TEXENV4_SOURCE 0x00F0 ///< Texture env 4 source. +#define GPUREG_TEXENV4_OPERAND 0x00F1 ///< Texture env 4 operand. +#define GPUREG_TEXENV4_COMBINER 0x00F2 ///< Texture env 4 combiner. +#define GPUREG_TEXENV4_COLOR 0x00F3 ///< Texture env 4 color. +#define GPUREG_TEXENV4_SCALE 0x00F4 ///< Texture env 4 scale. +#define GPUREG_00F5 0x00F5 ///< Unknown. +#define GPUREG_00F6 0x00F6 ///< Unknown. +#define GPUREG_00F7 0x00F7 ///< Unknown. +#define GPUREG_TEXENV5_SOURCE 0x00F8 ///< Texture env 5 source. +#define GPUREG_TEXENV5_OPERAND 0x00F9 ///< Texture env 5 operand. +#define GPUREG_TEXENV5_COMBINER 0x00FA ///< Texture env 5 combiner. +#define GPUREG_TEXENV5_COLOR 0x00FB ///< Texture env 5 color. +#define GPUREG_TEXENV5_SCALE 0x00FC ///< Texture env 5 scale. +#define GPUREG_TEXENV_BUFFER_COLOR 0x00FD ///< Texture env buffer color. +#define GPUREG_00FE 0x00FE ///< Unknown. +#define GPUREG_00FF 0x00FF ///< Unknown. +///@} -#define GPUREG_FACECULLING_CONFIG 0x0040 -#define GPUREG_VIEWPORT_WIDTH 0x0041 -#define GPUREG_VIEWPORT_INVW 0x0042 -#define GPUREG_VIEWPORT_HEIGHT 0x0043 -#define GPUREG_VIEWPORT_INVH 0x0044 -#define GPUREG_0045 0x0045 -#define GPUREG_0046 0x0046 -#define GPUREG_0047 0x0047 -#define GPUREG_0048 0x0048 -#define GPUREG_0049 0x0049 -#define GPUREG_004A 0x004A -#define GPUREG_004B 0x004B -#define GPUREG_004C 0x004C -#define GPUREG_DEPTHMAP_SCALE 0x004D -#define GPUREG_DEPTHMAP_OFFSET 0x004E -#define GPUREG_SH_OUTMAP_TOTAL 0x004F -#define GPUREG_SH_OUTMAP_O0 0x0050 -#define GPUREG_SH_OUTMAP_O1 0x0051 -#define GPUREG_SH_OUTMAP_O2 0x0052 -#define GPUREG_SH_OUTMAP_O3 0x0053 -#define GPUREG_SH_OUTMAP_O4 0x0054 -#define GPUREG_SH_OUTMAP_O5 0x0055 -#define GPUREG_SH_OUTMAP_O6 0x0056 -#define GPUREG_0057 0x0057 -#define GPUREG_0058 0x0058 -#define GPUREG_0059 0x0059 -#define GPUREG_005A 0x005A -#define GPUREG_005B 0x005B -#define GPUREG_005C 0x005C -#define GPUREG_005D 0x005D -#define GPUREG_005E 0x005E -#define GPUREG_005F 0x005F -#define GPUREG_0060 0x0060 -#define GPUREG_0061 0x0061 -#define GPUREG_0062 0x0062 -#define GPUREG_0063 0x0063 -#define GPUREG_0064 0x0064 -#define GPUREG_SCISSORTEST_MODE 0x0065 -#define GPUREG_SCISSORTEST_POS 0x0066 -#define GPUREG_SCISSORTEST_DIM 0x0067 -#define GPUREG_VIEWPORT_XY 0x0068 -#define GPUREG_0069 0x0069 -#define GPUREG_006A 0x006A -#define GPUREG_006B 0x006B -#define GPUREG_006C 0x006C -#define GPUREG_006D 0x006D -#define GPUREG_FRAMEBUFFER_DIM2 0x006E -#define GPUREG_006F 0x006F -#define GPUREG_0070 0x0070 -#define GPUREG_0071 0x0071 -#define GPUREG_0072 0x0072 -#define GPUREG_0073 0x0073 -#define GPUREG_0074 0x0074 -#define GPUREG_0075 0x0075 -#define GPUREG_0076 0x0076 -#define GPUREG_0077 0x0077 -#define GPUREG_0078 0x0078 -#define GPUREG_0079 0x0079 -#define GPUREG_007A 0x007A -#define GPUREG_007B 0x007B -#define GPUREG_007C 0x007C -#define GPUREG_007D 0x007D -#define GPUREG_007E 0x007E -#define GPUREG_007F 0x007F +///@name Framebuffer registers (0x100-0x13F) +///@{ +#define GPUREG_BLEND_ENABLE 0x0100 ///< Blend toggle. +#define GPUREG_BLEND_CONFIG 0x0101 ///< Blend configuration. +#define GPUREG_LOGICOP_CONFIG 0x0102 ///< Logical operator configuration. +#define GPUREG_BLEND_COLOR 0x0103 ///< Blend color. +#define GPUREG_ALPHATEST_CONFIG 0x0104 ///< Alpha test configuration. +#define GPUREG_STENCIL_TEST 0x0105 ///< Stencil test configuration. +#define GPUREG_STENCIL_ACTION 0x0106 ///< Stencil test action. +#define GPUREG_DEPTHTEST_CONFIG 0x0107 ///< Depth test configuration. +#define GPUREG_0108 0x0108 ///< Unknown. +#define GPUREG_0109 0x0109 ///< Unknown. +#define GPUREG_010A 0x010A ///< Unknown. +#define GPUREG_010B 0x010B ///< Unknown. +#define GPUREG_010C 0x010C ///< Unknown. +#define GPUREG_010D 0x010D ///< Unknown. +#define GPUREG_010E 0x010E ///< Unknown. +#define GPUREG_010F 0x010F ///< Unknown. +#define GPUREG_FRAMEBUFFER_INVALIDATE 0x0110 ///< Invalidates the frame buffer. +#define GPUREG_FRAMEBUFFER_FLUSH 0x0111 ///< Flushes the frame buffer. +#define GPUREG_COLORBUFFER_READ 0x0112 ///< Reads from the color buffer. +#define GPUREG_COLORBUFFER_WRITE 0x0113 ///< Writes to the color buffer. +#define GPUREG_DEPTHBUFFER_READ 0x0114 ///< Reads from the depth buffer. +#define GPUREG_DEPTHBUFFER_WRITE 0x0115 ///< Writes to the depth buffer. +#define GPUREG_DEPTHBUFFER_FORMAT 0x0116 ///< Depth buffer format. +#define GPUREG_COLORBUFFER_FORMAT 0x0117 ///< Color buffer format. +#define GPUREG_0118 0x0118 ///< Unknown. +#define GPUREG_0119 0x0119 ///< Unknown. +#define GPUREG_011A 0x011A ///< Unknown. +#define GPUREG_FRAMEBUFFER_BLOCK32 0x011B ///< Frame buffer block 32. +#define GPUREG_DEPTHBUFFER_LOC 0x011C ///< Depth buffer location. +#define GPUREG_COLORBUFFER_LOC 0x011D ///< Color buffer location. +#define GPUREG_FRAMEBUFFER_DIM 0x011E ///< Frame buffer dimensions. +#define GPUREG_011F 0x011F ///< Unknown. +#define GPUREG_0120 0x0120 ///< Unknown. +#define GPUREG_0121 0x0121 ///< Unknown. +#define GPUREG_0122 0x0122 ///< Unknown. +#define GPUREG_0123 0x0123 ///< Unknown. +#define GPUREG_0124 0x0124 ///< Unknown. +#define GPUREG_0125 0x0125 ///< Unknown. +#define GPUREG_0126 0x0126 ///< Unknown. +#define GPUREG_0127 0x0127 ///< Unknown. +#define GPUREG_0128 0x0128 ///< Unknown. +#define GPUREG_0129 0x0129 ///< Unknown. +#define GPUREG_012A 0x012A ///< Unknown. +#define GPUREG_012B 0x012B ///< Unknown. +#define GPUREG_012C 0x012C ///< Unknown. +#define GPUREG_012D 0x012D ///< Unknown. +#define GPUREG_012E 0x012E ///< Unknown. +#define GPUREG_012F 0x012F ///< Unknown. +#define GPUREG_0130 0x0130 ///< Unknown. +#define GPUREG_0131 0x0131 ///< Unknown. +#define GPUREG_0132 0x0132 ///< Unknown. +#define GPUREG_0133 0x0133 ///< Unknown. +#define GPUREG_0134 0x0134 ///< Unknown. +#define GPUREG_0135 0x0135 ///< Unknown. +#define GPUREG_0136 0x0136 ///< Unknown. +#define GPUREG_0137 0x0137 ///< Unknown. +#define GPUREG_0138 0x0138 ///< Unknown. +#define GPUREG_0139 0x0139 ///< Unknown. +#define GPUREG_013A 0x013A ///< Unknown. +#define GPUREG_013B 0x013B ///< Unknown. +#define GPUREG_013C 0x013C ///< Unknown. +#define GPUREG_013D 0x013D ///< Unknown. +#define GPUREG_013E 0x013E ///< Unknown. +#define GPUREG_013F 0x013F ///< Unknown. +///@} -//----------------------------------------------------------------------------- -// Texturing registers (0x080-0x0FF) -//----------------------------------------------------------------------------- +///@name Fragment lighting registers (0x140-0x1FF) +///@{ +#define GPUREG_LIGHT0_SPECULAR0 0x0140 ///< Light 0 specular lighting. +#define GPUREG_LIGHT0_SPECULAR1 0x0141 ///< Light 0 specular lighting. +#define GPUREG_LIGHT0_DIFFUSE 0x0142 ///< Light 0 diffuse lighting. +#define GPUREG_LIGHT0_AMBIENT 0x0143 ///< Light 0 ambient lighting. +#define GPUREG_LIGHT0_XY 0x0144 ///< Light 0 X and Y. +#define GPUREG_LIGHT0_Z 0x0145 ///< Light 0 Z. +#define GPUREG_LIGHT0_SPOTDIR_XY 0x0146 ///< Light 0 spotlight direction X and Y. +#define GPUREG_LIGHT0_SPOTDIR_Z 0x0147 ///< Light 0 spotlight direction Z. +#define GPUREG_0148 0x0148 ///< Unknown. +#define GPUREG_LIGHT0_CONFIG 0x0149 ///< Light 0 configuration. +#define GPUREG_LIGHT0_ATTENUATION_BIAS 0x014A ///< Light 0 attenuation bias. +#define GPUREG_LIGHT0_ATTENUATION_SCALE 0x014B ///< Light 0 attenuation scale. +#define GPUREG_014C 0x014C ///< Unknown. +#define GPUREG_014D 0x014D ///< Unknown. +#define GPUREG_014E 0x014E ///< Unknown. +#define GPUREG_014F 0x014F ///< Unknown. +#define GPUREG_LIGHT1_SPECULAR0 0x0150 ///< Light 1 specular lighting. +#define GPUREG_LIGHT1_SPECULAR1 0x0151 ///< Light 1 specular lighting. +#define GPUREG_LIGHT1_DIFFUSE 0x0152 ///< Light 1 diffuse lighting. +#define GPUREG_LIGHT1_AMBIENT 0x0153 ///< Light 1 ambient lighting. +#define GPUREG_LIGHT1_XY 0x0154 ///< Light 1 X and Y. +#define GPUREG_LIGHT1_Z 0x0155 ///< Light 1 Z. +#define GPUREG_LIGHT1_SPOTDIR_XY 0x0156 ///< Light 1 spotlight direction X and Y. +#define GPUREG_LIGHT1_SPOTDIR_Z 0x0157 ///< Light 1 spotlight direction Z. +#define GPUREG_0158 0x0158 ///< Unknown. +#define GPUREG_LIGHT1_CONFIG 0x0159 ///< Light 1 configuration. +#define GPUREG_LIGHT1_ATTENUATION_BIAS 0x015A ///< Light 1 attenuation bias. +#define GPUREG_LIGHT1_ATTENUATION_SCALE 0x015B ///< Light 1 attenuation scale. +#define GPUREG_015C 0x015C ///< Unknown. +#define GPUREG_015D 0x015D ///< Unknown. +#define GPUREG_015E 0x015E ///< Unknown. +#define GPUREG_015F 0x015F ///< Unknown. +#define GPUREG_LIGHT2_SPECULAR0 0x0160 ///< Light 2 specular lighting. +#define GPUREG_LIGHT2_SPECULAR1 0x0161 ///< Light 2 specular lighting. +#define GPUREG_LIGHT2_DIFFUSE 0x0162 ///< Light 2 diffuse lighting. +#define GPUREG_LIGHT2_AMBIENT 0x0163 ///< Light 2 ambient lighting. +#define GPUREG_LIGHT2_XY 0x0164 ///< Light 2 X and Y. +#define GPUREG_LIGHT2_Z 0x0165 ///< Light 2 Z. +#define GPUREG_LIGHT2_SPOTDIR_XY 0x0166 ///< Light 2 spotlight direction X and Y. +#define GPUREG_LIGHT2_SPOTDIR_Z 0x0167 ///< Light 2 spotlight direction Z. +#define GPUREG_0168 0x0168 ///< Unknown. +#define GPUREG_LIGHT2_CONFIG 0x0169 ///< Light 2 configuration. +#define GPUREG_LIGHT2_ATTENUATION_BIAS 0x016A ///< Light 2 attenuation bias. +#define GPUREG_LIGHT2_ATTENUATION_SCALE 0x016B ///< Light 2 attenuation scale. +#define GPUREG_016C 0x016C ///< Unknown. +#define GPUREG_016D 0x016D ///< Unknown. +#define GPUREG_016E 0x016E ///< Unknown. +#define GPUREG_016F 0x016F ///< Unknown. +#define GPUREG_LIGHT3_SPECULAR0 0x0170 ///< Light 3 specular lighting. +#define GPUREG_LIGHT3_SPECULAR1 0x0171 ///< Light 3 specular lighting. +#define GPUREG_LIGHT3_DIFFUSE 0x0172 ///< Light 3 diffuse lighting. +#define GPUREG_LIGHT3_AMBIENT 0x0173 ///< Light 3 ambient lighting. +#define GPUREG_LIGHT3_XY 0x0174 ///< Light 3 X and Y. +#define GPUREG_LIGHT3_Z 0x0175 ///< Light 3 Z. +#define GPUREG_LIGHT3_SPOTDIR_XY 0x0176 ///< Light 3 spotlight direction X and Y. +#define GPUREG_LIGHT3_SPOTDIR_Z 0x0177 ///< Light 3 spotlight direction Z. +#define GPUREG_0178 0x0178 ///< Unknown. +#define GPUREG_LIGHT3_CONFIG 0x0179 ///< Light 3 configuration. +#define GPUREG_LIGHT3_ATTENUATION_BIAS 0x017A ///< Light 3 attenuation bias. +#define GPUREG_LIGHT3_ATTENUATION_SCALE 0x017B ///< Light 3 attenuation scale. +#define GPUREG_017C 0x017C ///< Unknown. +#define GPUREG_017D 0x017D ///< Unknown. +#define GPUREG_017E 0x017E ///< Unknown. +#define GPUREG_017F 0x017F ///< Unknown. +#define GPUREG_LIGHT4_SPECULAR0 0x0180 ///< Light 4 specular lighting. +#define GPUREG_LIGHT4_SPECULAR1 0x0181 ///< Light 4 specular lighting. +#define GPUREG_LIGHT4_DIFFUSE 0x0182 ///< Light 4 diffuse lighting. +#define GPUREG_LIGHT4_AMBIENT 0x0183 ///< Light 4 ambient lighting. +#define GPUREG_LIGHT4_XY 0x0184 ///< Light 4 X and Y. +#define GPUREG_LIGHT4_Z 0x0185 ///< Light 4 Z. +#define GPUREG_LIGHT4_SPOTDIR_XY 0x0186 ///< Light 4 spotlight direction X and Y. +#define GPUREG_LIGHT4_SPOTDIR_Z 0x0187 ///< Light 4 spotlight direction Z. +#define GPUREG_0188 0x0188 ///< Unknown. +#define GPUREG_LIGHT4_CONFIG 0x0189 ///< Light 4 configuration. +#define GPUREG_LIGHT4_ATTENUATION_BIAS 0x018A ///< Light 4 attenuation bias. +#define GPUREG_LIGHT4_ATTENUATION_SCALE 0x018B ///< Light 4 attenuation scale. +#define GPUREG_018C 0x018C ///< Unknown. +#define GPUREG_018D 0x018D ///< Unknown. +#define GPUREG_018E 0x018E ///< Unknown. +#define GPUREG_018F 0x018F ///< Unknown. +#define GPUREG_LIGHT5_SPECULAR0 0x0190 ///< Light 5 specular lighting. +#define GPUREG_LIGHT5_SPECULAR1 0x0191 ///< Light 5 specular lighting. +#define GPUREG_LIGHT5_DIFFUSE 0x0192 ///< Light 5 diffuse lighting. +#define GPUREG_LIGHT5_AMBIENT 0x0193 ///< Light 5 ambient lighting. +#define GPUREG_LIGHT5_XY 0x0194 ///< Light 5 X and Y. +#define GPUREG_LIGHT5_Z 0x0195 ///< Light 5 Z. +#define GPUREG_LIGHT5_SPOTDIR_XY 0x0196 ///< Light 5 spotlight direction X and Y. +#define GPUREG_LIGHT5_SPOTDIR_Z 0x0197 ///< Light 5 spotlight direction Z. +#define GPUREG_0198 0x0198 ///< Unknown. +#define GPUREG_LIGHT5_CONFIG 0x0199 ///< Light 5 configuration. +#define GPUREG_LIGHT5_ATTENUATION_BIAS 0x019A ///< Light 5 attenuation bias. +#define GPUREG_LIGHT5_ATTENUATION_SCALE 0x019B ///< Light 5 attenuation scale. +#define GPUREG_019C 0x019C ///< Unknown. +#define GPUREG_019D 0x019D ///< Unknown. +#define GPUREG_019E 0x019E ///< Unknown. +#define GPUREG_019F 0x019F ///< Unknown. +#define GPUREG_LIGHT6_SPECULAR0 0x01A0 ///< Light 6 specular lighting. +#define GPUREG_LIGHT6_SPECULAR1 0x01A1 ///< Light 6 specular lighting. +#define GPUREG_LIGHT6_DIFFUSE 0x01A2 ///< Light 6 diffuse lighting. +#define GPUREG_LIGHT6_AMBIENT 0x01A3 ///< Light 6 ambient lighting. +#define GPUREG_LIGHT6_XY 0x01A4 ///< Light 6 X and Y. +#define GPUREG_LIGHT6_Z 0x01A5 ///< Light 6 Z. +#define GPUREG_LIGHT6_SPOTDIR_XY 0x01A6 ///< Light 6 spotlight direction X and Y. +#define GPUREG_LIGHT6_SPOTDIR_Z 0x01A7 ///< Light 6 spotlight direction Z. +#define GPUREG_01A8 0x01A8 ///< Unknown. +#define GPUREG_LIGHT6_CONFIG 0x01A9 ///< Light 6 configuration. +#define GPUREG_LIGHT6_ATTENUATION_BIAS 0x01AA ///< Light 6 attenuation bias. +#define GPUREG_LIGHT6_ATTENUATION_SCALE 0x01AB ///< Light 6 attenuation scale. +#define GPUREG_01AC 0x01AC ///< Unknown. +#define GPUREG_01AD 0x01AD ///< Unknown. +#define GPUREG_01AE 0x01AE ///< Unknown. +#define GPUREG_01AF 0x01AF ///< Unknown. +#define GPUREG_LIGHT7_SPECULAR0 0x01B0 ///< Light 7 specular lighting. +#define GPUREG_LIGHT7_SPECULAR1 0x01B1 ///< Light 7 specular lighting. +#define GPUREG_LIGHT7_DIFFUSE 0x01B2 ///< Light 7 diffuse lighting. +#define GPUREG_LIGHT7_AMBIENT 0x01B3 ///< Light 7 ambient lighting. +#define GPUREG_LIGHT7_XY 0x01B4 ///< Light 7 X and Y. +#define GPUREG_LIGHT7_Z 0x01B5 ///< Light 7 Z. +#define GPUREG_LIGHT7_SPOTDIR_XY 0x01B6 ///< Light 7 spotlight direction X and Y. +#define GPUREG_LIGHT7_SPOTDIR_Z 0x01B7 ///< Light 7 spotlight direction Z. +#define GPUREG_01B8 0x01B8 ///< Unknown. +#define GPUREG_LIGHT7_CONFIG 0x01B9 ///< Light 7 configuration. +#define GPUREG_LIGHT7_ATTENUATION_BIAS 0x01BA ///< Light 7 attenuation bias. +#define GPUREG_LIGHT7_ATTENUATION_SCALE 0x01BB ///< Light 7 attenuation scale. +#define GPUREG_01BC 0x01BC ///< Unknown. +#define GPUREG_01BD 0x01BD ///< Unknown. +#define GPUREG_01BE 0x01BE ///< Unknown. +#define GPUREG_01BF 0x01BF ///< Unknown. +#define GPUREG_LIGHTING_AMBIENT 0x01C0 ///< Ambient lighting. +#define GPUREG_01C1 0x01C1 ///< Unknown. +#define GPUREG_LIGHTING_NUM_LIGHTS 0x01C2 ///< Number of lights. +#define GPUREG_LIGHTING_CONFIG0 0x01C3 ///< Lighting configuration. +#define GPUREG_LIGHTING_CONFIG1 0x01C4 ///< Lighting configuration. +#define GPUREG_LIGHTING_LUT_INDEX 0x01C5 ///< LUT index. +#define GPUREG_LIGHTING_ENABLE1 0x01C6 ///< Lighting toggle. +#define GPUREG_01C7 0x01C7 ///< Unknown. +#define GPUREG_LIGHTING_LUT_DATA0 0x01C8 ///< LUT data 0. +#define GPUREG_LIGHTING_LUT_DATA1 0x01C9 ///< LUT data 1. +#define GPUREG_LIGHTING_LUT_DATA2 0x01CA ///< LUT data 2. +#define GPUREG_LIGHTING_LUT_DATA3 0x01CB ///< LUT data 3. +#define GPUREG_LIGHTING_LUT_DATA4 0x01CC ///< LUT data 4. +#define GPUREG_LIGHTING_LUT_DATA5 0x01CD ///< LUT data 5. +#define GPUREG_LIGHTING_LUT_DATA6 0x01CE ///< LUT data 6. +#define GPUREG_LIGHTING_LUT_DATA7 0x01CF ///< LUT data 7. +#define GPUREG_LIGHTING_LUTINPUT_ABS 0x01D0 ///< LUT input abs. +#define GPUREG_LIGHTING_LUTINPUT_SELECT 0x01D1 ///< LUT input selector. +#define GPUREG_LIGHTING_LUTINPUT_SCALE 0x01D2 ///< LUT input scale. +#define GPUREG_01D3 0x01D3 ///< Unknown. +#define GPUREG_01D4 0x01D4 ///< Unknown. +#define GPUREG_01D5 0x01D5 ///< Unknown. +#define GPUREG_01D6 0x01D6 ///< Unknown. +#define GPUREG_01D7 0x01D7 ///< Unknown. +#define GPUREG_01D8 0x01D8 ///< Unknown. +#define GPUREG_LIGHTING_LIGHT_PERMUTATION 0x01D9 ///< Light permutation. +#define GPUREG_01DA 0x01DA ///< Unknown. +#define GPUREG_01DB 0x01DB ///< Unknown. +#define GPUREG_01DC 0x01DC ///< Unknown. +#define GPUREG_01DD 0x01DD ///< Unknown. +#define GPUREG_01DE 0x01DE ///< Unknown. +#define GPUREG_01DF 0x01DF ///< Unknown. +#define GPUREG_01E0 0x01E0 ///< Unknown. +#define GPUREG_01E1 0x01E1 ///< Unknown. +#define GPUREG_01E2 0x01E2 ///< Unknown. +#define GPUREG_01E3 0x01E3 ///< Unknown. +#define GPUREG_01E4 0x01E4 ///< Unknown. +#define GPUREG_01E5 0x01E5 ///< Unknown. +#define GPUREG_01E6 0x01E6 ///< Unknown. +#define GPUREG_01E7 0x01E7 ///< Unknown. +#define GPUREG_01E8 0x01E8 ///< Unknown. +#define GPUREG_01E9 0x01E9 ///< Unknown. +#define GPUREG_01EA 0x01EA ///< Unknown. +#define GPUREG_01EB 0x01EB ///< Unknown. +#define GPUREG_01EC 0x01EC ///< Unknown. +#define GPUREG_01ED 0x01ED ///< Unknown. +#define GPUREG_01EE 0x01EE ///< Unknown. +#define GPUREG_01EF 0x01EF ///< Unknown. +#define GPUREG_01F0 0x01F0 ///< Unknown. +#define GPUREG_01F1 0x01F1 ///< Unknown. +#define GPUREG_01F2 0x01F2 ///< Unknown. +#define GPUREG_01F3 0x01F3 ///< Unknown. +#define GPUREG_01F4 0x01F4 ///< Unknown. +#define GPUREG_01F5 0x01F5 ///< Unknown. +#define GPUREG_01F6 0x01F6 ///< Unknown. +#define GPUREG_01F7 0x01F7 ///< Unknown. +#define GPUREG_01F8 0x01F8 ///< Unknown. +#define GPUREG_01F9 0x01F9 ///< Unknown. +#define GPUREG_01FA 0x01FA ///< Unknown. +#define GPUREG_01FB 0x01FB ///< Unknown. +#define GPUREG_01FC 0x01FC ///< Unknown. +#define GPUREG_01FD 0x01FD ///< Unknown. +#define GPUREG_01FE 0x01FE ///< Unknown. +#define GPUREG_01FF 0x01FF ///< Unknown. +///@} -#define GPUREG_TEXUNIT_ENABLE 0x0080 -#define GPUREG_TEXUNIT0_BORDER_COLOR 0x0081 -#define GPUREG_TEXUNIT0_DIM 0x0082 -#define GPUREG_TEXUNIT0_PARAM 0x0083 -#define GPUREG_0084 0x0084 -#define GPUREG_TEXUNIT0_LOC 0x0085 -#define GPUREG_0086 0x0086 -#define GPUREG_0087 0x0087 -#define GPUREG_0088 0x0088 -#define GPUREG_0089 0x0089 -#define GPUREG_008A 0x008A -#define GPUREG_008B 0x008B -#define GPUREG_008C 0x008C -#define GPUREG_008D 0x008D -#define GPUREG_TEXUNIT0_TYPE 0x008E -#define GPUREG_LIGHTING_ENABLE0 0x008F -#define GPUREG_0090 0x0090 -#define GPUREG_TEXUNIT1_BORDER_COLOR 0x0091 -#define GPUREG_TEXUNIT1_DIM 0x0092 -#define GPUREG_TEXUNIT1_PARAM 0x0093 -#define GPUREG_0094 0x0094 -#define GPUREG_TEXUNIT1_LOC 0x0095 -#define GPUREG_TEXUNIT1_TYPE 0x0096 -#define GPUREG_0097 0x0097 -#define GPUREG_0098 0x0098 -#define GPUREG_TEXUNIT2_BORDER_COLOR 0x0099 -#define GPUREG_TEXUNIT2_DIM 0x009A -#define GPUREG_TEXUNIT2_PARAM 0x009B -#define GPUREG_009C 0x009C -#define GPUREG_TEXUNIT2_LOC 0x009D -#define GPUREG_TEXUNIT2_TYPE 0x009E -#define GPUREG_009F 0x009F -#define GPUREG_00A0 0x00A0 -#define GPUREG_00A1 0x00A1 -#define GPUREG_00A2 0x00A2 -#define GPUREG_00A3 0x00A3 -#define GPUREG_00A4 0x00A4 -#define GPUREG_00A5 0x00A5 -#define GPUREG_00A6 0x00A6 -#define GPUREG_00A7 0x00A7 -#define GPUREG_00A8 0x00A8 -#define GPUREG_00A9 0x00A9 -#define GPUREG_00AA 0x00AA -#define GPUREG_00AB 0x00AB -#define GPUREG_00AC 0x00AC -#define GPUREG_00AD 0x00AD -#define GPUREG_00AE 0x00AE -#define GPUREG_00AF 0x00AF -#define GPUREG_00B0 0x00B0 -#define GPUREG_00B1 0x00B1 -#define GPUREG_00B2 0x00B2 -#define GPUREG_00B3 0x00B3 -#define GPUREG_00B4 0x00B4 -#define GPUREG_00B5 0x00B5 -#define GPUREG_00B6 0x00B6 -#define GPUREG_00B7 0x00B7 -#define GPUREG_00B8 0x00B8 -#define GPUREG_00B9 0x00B9 -#define GPUREG_00BA 0x00BA -#define GPUREG_00BB 0x00BB -#define GPUREG_00BC 0x00BC -#define GPUREG_00BD 0x00BD -#define GPUREG_00BE 0x00BE -#define GPUREG_00BF 0x00BF -#define GPUREG_TEXENV0_SOURCE 0x00C0 -#define GPUREG_TEXENV0_OPERAND 0x00C1 -#define GPUREG_TEXENV0_COMBINER 0x00C2 -#define GPUREG_TEXENV0_COLOR 0x00C3 -#define GPUREG_TEXENV0_SCALE 0x00C4 -#define GPUREG_00C5 0x00C5 -#define GPUREG_00C6 0x00C6 -#define GPUREG_00C7 0x00C7 -#define GPUREG_TEXENV1_SOURCE 0x00C8 -#define GPUREG_TEXENV1_OPERAND 0x00C9 -#define GPUREG_TEXENV1_COMBINER 0x00CA -#define GPUREG_TEXENV1_COLOR 0x00CB -#define GPUREG_TEXENV1_SCALE 0x00CC -#define GPUREG_00CD 0x00CD -#define GPUREG_00CE 0x00CE -#define GPUREG_00CF 0x00CF -#define GPUREG_TEXENV2_SOURCE 0x00D0 -#define GPUREG_TEXENV2_OPERAND 0x00D1 -#define GPUREG_TEXENV2_COMBINER 0x00D2 -#define GPUREG_TEXENV2_COLOR 0x00D3 -#define GPUREG_TEXENV2_SCALE 0x00D4 -#define GPUREG_00D5 0x00D5 -#define GPUREG_00D6 0x00D6 -#define GPUREG_00D7 0x00D7 -#define GPUREG_TEXENV3_SOURCE 0x00D8 -#define GPUREG_TEXENV3_OPERAND 0x00D9 -#define GPUREG_TEXENV3_COMBINER 0x00DA -#define GPUREG_TEXENV3_COLOR 0x00DB -#define GPUREG_TEXENV3_SCALE 0x00DC -#define GPUREG_00DD 0x00DD -#define GPUREG_00DE 0x00DE -#define GPUREG_00DF 0x00DF -#define GPUREG_TEXENV_UPDATE_BUFFER 0x00E0 -#define GPUREG_00E1 0x00E1 -#define GPUREG_00E2 0x00E2 -#define GPUREG_00E3 0x00E3 -#define GPUREG_00E4 0x00E4 -#define GPUREG_00E5 0x00E5 -#define GPUREG_00E6 0x00E6 -#define GPUREG_00E7 0x00E7 -#define GPUREG_00E8 0x00E8 -#define GPUREG_00E9 0x00E9 -#define GPUREG_00EA 0x00EA -#define GPUREG_00EB 0x00EB -#define GPUREG_00EC 0x00EC -#define GPUREG_00ED 0x00ED -#define GPUREG_00EE 0x00EE -#define GPUREG_00EF 0x00EF -#define GPUREG_TEXENV4_SOURCE 0x00F0 -#define GPUREG_TEXENV4_OPERAND 0x00F1 -#define GPUREG_TEXENV4_COMBINER 0x00F2 -#define GPUREG_TEXENV4_COLOR 0x00F3 -#define GPUREG_TEXENV4_SCALE 0x00F4 -#define GPUREG_00F5 0x00F5 -#define GPUREG_00F6 0x00F6 -#define GPUREG_00F7 0x00F7 -#define GPUREG_TEXENV5_SOURCE 0x00F8 -#define GPUREG_TEXENV5_OPERAND 0x00F9 -#define GPUREG_TEXENV5_COMBINER 0x00FA -#define GPUREG_TEXENV5_COLOR 0x00FB -#define GPUREG_TEXENV5_SCALE 0x00FC -#define GPUREG_TEXENV_BUFFER_COLOR 0x00FD -#define GPUREG_00FE 0x00FE -#define GPUREG_00FF 0x00FF +///@name Geometry pipeline registers (0x200-0x27F) +///@{ +#define GPUREG_ATTRIBBUFFERS_LOC 0x0200 ///< Attribute buffers location. +#define GPUREG_ATTRIBBUFFERS_FORMAT_LOW 0x0201 ///< Attribute buffers format low. +#define GPUREG_ATTRIBBUFFERS_FORMAT_HIGH 0x0202 ///< Attribute buffers format high. +#define GPUREG_ATTRIBBUFFER0_OFFSET 0x0203 ///< Attribute buffers 0 offset. +#define GPUREG_ATTRIBBUFFER0_CONFIG1 0x0204 ///< Attribute buffers 0 configuration. +#define GPUREG_ATTRIBBUFFER0_CONFIG2 0x0205 ///< Attribute buffers 0 configuration. +#define GPUREG_ATTRIBBUFFER1_OFFSET 0x0206 ///< Attribute buffers 1 offset. +#define GPUREG_ATTRIBBUFFER1_CONFIG1 0x0207 ///< Attribute buffers 1 configuration. +#define GPUREG_ATTRIBBUFFER1_CONFIG2 0x0208 ///< Attribute buffers 1 configuration. +#define GPUREG_ATTRIBBUFFER2_OFFSET 0x0209 ///< Attribute buffers 2 offset. +#define GPUREG_ATTRIBBUFFER2_CONFIG1 0x020A ///< Attribute buffers 2 configuration. +#define GPUREG_ATTRIBBUFFER2_CONFIG2 0x020B ///< Attribute buffers 2 configuration. +#define GPUREG_ATTRIBBUFFER3_OFFSET 0x020C ///< Attribute buffers 3 offset. +#define GPUREG_ATTRIBBUFFER3_CONFIG1 0x020D ///< Attribute buffers 3 configuration. +#define GPUREG_ATTRIBBUFFER3_CONFIG2 0x020E ///< Attribute buffers 3 configuration. +#define GPUREG_ATTRIBBUFFER4_OFFSET 0x020F ///< Attribute buffers 4 offset. +#define GPUREG_ATTRIBBUFFER4_CONFIG1 0x0210 ///< Attribute buffers 4 configuration. +#define GPUREG_ATTRIBBUFFER4_CONFIG2 0x0211 ///< Attribute buffers 4 configuration. +#define GPUREG_ATTRIBBUFFER5_OFFSET 0x0212 ///< Attribute buffers 5 offset. +#define GPUREG_ATTRIBBUFFER5_CONFIG1 0x0213 ///< Attribute buffers 5 configuration. +#define GPUREG_ATTRIBBUFFER5_CONFIG2 0x0214 ///< Attribute buffers 5 configuration. +#define GPUREG_ATTRIBBUFFER6_OFFSET 0x0215 ///< Attribute buffers 6 offset. +#define GPUREG_ATTRIBBUFFER6_CONFIG1 0x0216 ///< Attribute buffers 6 configuration. +#define GPUREG_ATTRIBBUFFER6_CONFIG2 0x0217 ///< Attribute buffers 6 configuration. +#define GPUREG_ATTRIBBUFFER7_OFFSET 0x0218 ///< Attribute buffers 7 offset. +#define GPUREG_ATTRIBBUFFER7_CONFIG1 0x0219 ///< Attribute buffers 7 configuration. +#define GPUREG_ATTRIBBUFFER7_CONFIG2 0x021A ///< Attribute buffers 7 configuration. +#define GPUREG_ATTRIBBUFFER8_OFFSET 0x021B ///< Attribute buffers 8 offset. +#define GPUREG_ATTRIBBUFFER8_CONFIG1 0x021C ///< Attribute buffers 8 configuration. +#define GPUREG_ATTRIBBUFFER8_CONFIG2 0x021D ///< Attribute buffers 8 configuration. +#define GPUREG_ATTRIBBUFFER9_OFFSET 0x021E ///< Attribute buffers 9 offset. +#define GPUREG_ATTRIBBUFFER9_CONFIG1 0x021F ///< Attribute buffers 9 configuration. +#define GPUREG_ATTRIBBUFFER9_CONFIG2 0x0220 ///< Attribute buffers 9 configuration. +#define GPUREG_ATTRIBBUFFERA_OFFSET 0x0221 ///< Attribute buffers A offset. +#define GPUREG_ATTRIBBUFFERA_CONFIG1 0x0222 ///< Attribute buffers A configuration. +#define GPUREG_ATTRIBBUFFERA_CONFIG2 0x0223 ///< Attribute buffers A configuration. +#define GPUREG_ATTRIBBUFFERB_OFFSET 0x0224 ///< Attribute buffers B offset. +#define GPUREG_ATTRIBBUFFERB_CONFIG1 0x0225 ///< Attribute buffers B configuration. +#define GPUREG_ATTRIBBUFFERB_CONFIG2 0x0226 ///< Attribute buffers B configuration. +#define GPUREG_INDEXBUFFER_CONFIG 0x0227 ///< Index buffer configuration. +#define GPUREG_NUMVERTICES 0x0228 ///< Number of vertices. +#define GPUREG_GEOSTAGE_CONFIG 0x0229 ///< Geometry stage configuration. +#define GPUREG_VERTEX_OFFSET 0x022A ///< Vertex offset. +#define GPUREG_022B 0x022B ///< Unknown. +#define GPUREG_022C 0x022C ///< Unknown. +#define GPUREG_022D 0x022D ///< Unknown. +#define GPUREG_DRAWARRAYS 0x022E ///< Draw arrays trigger. +#define GPUREG_DRAWELEMENTS 0x022F ///< Draw arrays elements. +#define GPUREG_0230 0x0230 ///< Unknown. +#define GPUREG_0231 0x0231 ///< Unknown. +#define GPUREG_FIXEDATTRIB_INDEX 0x0232 ///< Fixed attribute index. +#define GPUREG_FIXEDATTRIB_DATA0 0x0233 ///< Fixed attribute data 0. +#define GPUREG_FIXEDATTRIB_DATA1 0x0234 ///< Fixed attribute data 1. +#define GPUREG_FIXEDATTRIB_DATA2 0x0235 ///< Fixed attribute data 2. +#define GPUREG_0236 0x0236 ///< Unknown. +#define GPUREG_0237 0x0237 ///< Unknown. +#define GPUREG_CMDBUF_SIZE0 0x0238 ///< Command buffer size 0. +#define GPUREG_CMDBUF_SIZE1 0x0239 ///< Command buffer size 1. +#define GPUREG_CMDBUF_ADDR0 0x023A ///< Command buffer address 0. +#define GPUREG_CMDBUF_ADDR1 0x023B ///< Command buffer address 1. +#define GPUREG_CMDBUF_JUMP0 0x023C ///< Command buffer jump 0. +#define GPUREG_CMDBUF_JUMP1 0x023D ///< Command buffer jump 1. +#define GPUREG_023E 0x023E ///< Unknown. +#define GPUREG_023F 0x023F ///< Unknown. +#define GPUREG_0240 0x0240 ///< Unknown. +#define GPUREG_0241 0x0241 ///< Unknown. +#define GPUREG_0242 0x0242 ///< Unknown. +#define GPUREG_0243 0x0243 ///< Unknown. +#define GPUREG_0244 0x0244 ///< Unknown. +#define GPUREG_0245 0x0245 ///< Unknown. +#define GPUREG_0246 0x0246 ///< Unknown. +#define GPUREG_0247 0x0247 ///< Unknown. +#define GPUREG_0248 0x0248 ///< Unknown. +#define GPUREG_0249 0x0249 ///< Unknown. +#define GPUREG_024A 0x024A ///< Unknown. +#define GPUREG_024B 0x024B ///< Unknown. +#define GPUREG_024C 0x024C ///< Unknown. +#define GPUREG_024D 0x024D ///< Unknown. +#define GPUREG_024E 0x024E ///< Unknown. +#define GPUREG_024F 0x024F ///< Unknown. +#define GPUREG_0250 0x0250 ///< Unknown. +#define GPUREG_0251 0x0251 ///< Unknown. +#define GPUREG_0252 0x0252 ///< Unknown. +#define GPUREG_0253 0x0253 ///< Unknown. +#define GPUREG_0254 0x0254 ///< Unknown. +#define GPUREG_0255 0x0255 ///< Unknown. +#define GPUREG_0256 0x0256 ///< Unknown. +#define GPUREG_0257 0x0257 ///< Unknown. +#define GPUREG_0258 0x0258 ///< Unknown. +#define GPUREG_0259 0x0259 ///< Unknown. +#define GPUREG_025A 0x025A ///< Unknown. +#define GPUREG_025B 0x025B ///< Unknown. +#define GPUREG_025C 0x025C ///< Unknown. +#define GPUREG_025D 0x025D ///< Unknown. +#define GPUREG_PRIMITIVE_CONFIG 0x025E ///< Primitive configuration. +#define GPUREG_RESTART_PRIMITIVE 0x025F ///< Restart primitive flag. +#define GPUREG_0260 0x0260 ///< Unknown. +#define GPUREG_0261 0x0261 ///< Unknown. +#define GPUREG_0262 0x0262 ///< Unknown. +#define GPUREG_0263 0x0263 ///< Unknown. +#define GPUREG_0264 0x0264 ///< Unknown. +#define GPUREG_0265 0x0265 ///< Unknown. +#define GPUREG_0266 0x0266 ///< Unknown. +#define GPUREG_0267 0x0267 ///< Unknown. +#define GPUREG_0268 0x0268 ///< Unknown. +#define GPUREG_0269 0x0269 ///< Unknown. +#define GPUREG_026A 0x026A ///< Unknown. +#define GPUREG_026B 0x026B ///< Unknown. +#define GPUREG_026C 0x026C ///< Unknown. +#define GPUREG_026D 0x026D ///< Unknown. +#define GPUREG_026E 0x026E ///< Unknown. +#define GPUREG_026F 0x026F ///< Unknown. +#define GPUREG_0270 0x0270 ///< Unknown. +#define GPUREG_0271 0x0271 ///< Unknown. +#define GPUREG_0272 0x0272 ///< Unknown. +#define GPUREG_0273 0x0273 ///< Unknown. +#define GPUREG_0274 0x0274 ///< Unknown. +#define GPUREG_0275 0x0275 ///< Unknown. +#define GPUREG_0276 0x0276 ///< Unknown. +#define GPUREG_0277 0x0277 ///< Unknown. +#define GPUREG_0278 0x0278 ///< Unknown. +#define GPUREG_0279 0x0279 ///< Unknown. +#define GPUREG_027A 0x027A ///< Unknown. +#define GPUREG_027B 0x027B ///< Unknown. +#define GPUREG_027C 0x027C ///< Unknown. +#define GPUREG_027D 0x027D ///< Unknown. +#define GPUREG_027E 0x027E ///< Unknown. +#define GPUREG_027F 0x027F ///< Unknown. +///@} -//----------------------------------------------------------------------------- -// Framebuffer registers (0x100-0x13F) -//----------------------------------------------------------------------------- +///@name Geometry shader registers (0x280-0x2AF) +///@{ +#define GPUREG_GSH_BOOLUNIFORM 0x0280 ///< Geometry shader bool uniforms. +#define GPUREG_GSH_INTUNIFORM_I0 0x0281 ///< Geometry shader integer uniform 0. +#define GPUREG_GSH_INTUNIFORM_I1 0x0282 ///< Geometry shader integer uniform 1. +#define GPUREG_GSH_INTUNIFORM_I2 0x0283 ///< Geometry shader integer uniform 2. +#define GPUREG_GSH_INTUNIFORM_I3 0x0284 ///< Geometry shader integer uniform 3. +#define GPUREG_0285 0x0285 ///< Unknown. +#define GPUREG_0286 0x0286 ///< Unknown. +#define GPUREG_0287 0x0287 ///< Unknown. +#define GPUREG_0288 0x0288 ///< Unknown. +#define GPUREG_GSH_INPUTBUFFER_CONFIG 0x0289 ///< Geometry shader input buffer configuration. +#define GPUREG_GSH_ENTRYPOINT 0x028A ///< Geometry shader entry point. +#define GPUREG_GSH_ATTRIBUTES_PERMUTATION_LOW 0x028B ///< Geometry shader attribute permutations low. +#define GPUREG_GSH_ATTRIBUTES_PERMUTATION_HIGH 0x028C ///< Geometry shader attribute permutations high. +#define GPUREG_GSH_OUTMAP_MASK 0x028D ///< Geometry shader output map mask. +#define GPUREG_028E 0x028E ///< Unknown. +#define GPUREG_GSH_CODETRANSFER_END 0x028F ///< Geometry shader code transfer end trigger. +#define GPUREG_GSH_FLOATUNIFORM_CONFIG 0x0290 ///< Geometry shader float uniform configuration. +#define GPUREG_GSH_FLOATUNIFORM_DATA 0x0291 ///< Geometry shader float uniform data. +#define GPUREG_0299 0x0299 ///< Unknown. +#define GPUREG_029A 0x029A ///< Unknown. +#define GPUREG_GSH_CODETRANSFER_CONFIG 0x029B ///< Geometry shader code transfer configuration. +#define GPUREG_GSH_CODETRANSFER_DATA 0x029C ///< Geometry shader code transfer data. +#define GPUREG_02A4 0x02A4 ///< Unknown. +#define GPUREG_GSH_OPDESCS_CONFIG 0x02A5 ///< Geometry shader operand description configuration. +#define GPUREG_GSH_OPDESCS_DATA 0x02A6 ///< Geometry shader operand description data. +#define GPUREG_02AE 0x02AE ///< Unknown. +#define GPUREG_02AF 0x02AF ///< Unknown. +///@} -#define GPUREG_BLEND_ENABLE 0x0100 -#define GPUREG_BLEND_CONFIG 0x0101 -#define GPUREG_LOGICOP_CONFIG 0x0102 -#define GPUREG_BLEND_COLOR 0x0103 -#define GPUREG_ALPHATEST_CONFIG 0x0104 -#define GPUREG_STENCIL_TEST 0x0105 -#define GPUREG_STENCIL_ACTION 0x0106 -#define GPUREG_DEPTHTEST_CONFIG 0x0107 -#define GPUREG_0108 0x0108 -#define GPUREG_0109 0x0109 -#define GPUREG_010A 0x010A -#define GPUREG_010B 0x010B -#define GPUREG_010C 0x010C -#define GPUREG_010D 0x010D -#define GPUREG_010E 0x010E -#define GPUREG_010F 0x010F -#define GPUREG_FRAMEBUFFER_INVALIDATE 0x0110 -#define GPUREG_FRAMEBUFFER_FLUSH 0x0111 -#define GPUREG_COLORBUFFER_READ 0x0112 -#define GPUREG_COLORBUFFER_WRITE 0x0113 -#define GPUREG_DEPTHBUFFER_READ 0x0114 -#define GPUREG_DEPTHBUFFER_WRITE 0x0115 -#define GPUREG_DEPTHBUFFER_FORMAT 0x0116 -#define GPUREG_COLORBUFFER_FORMAT 0x0117 -#define GPUREG_0118 0x0118 -#define GPUREG_0119 0x0119 -#define GPUREG_011A 0x011A -#define GPUREG_FRAMEBUFFER_BLOCK32 0x011B -#define GPUREG_DEPTHBUFFER_LOC 0x011C -#define GPUREG_COLORBUFFER_LOC 0x011D -#define GPUREG_FRAMEBUFFER_DIM 0x011E -#define GPUREG_011F 0x011F -#define GPUREG_0120 0x0120 -#define GPUREG_0121 0x0121 -#define GPUREG_0122 0x0122 -#define GPUREG_0123 0x0123 -#define GPUREG_0124 0x0124 -#define GPUREG_0125 0x0125 -#define GPUREG_0126 0x0126 -#define GPUREG_0127 0x0127 -#define GPUREG_0128 0x0128 -#define GPUREG_0129 0x0129 -#define GPUREG_012A 0x012A -#define GPUREG_012B 0x012B -#define GPUREG_012C 0x012C -#define GPUREG_012D 0x012D -#define GPUREG_012E 0x012E -#define GPUREG_012F 0x012F -#define GPUREG_0130 0x0130 -#define GPUREG_0131 0x0131 -#define GPUREG_0132 0x0132 -#define GPUREG_0133 0x0133 -#define GPUREG_0134 0x0134 -#define GPUREG_0135 0x0135 -#define GPUREG_0136 0x0136 -#define GPUREG_0137 0x0137 -#define GPUREG_0138 0x0138 -#define GPUREG_0139 0x0139 -#define GPUREG_013A 0x013A -#define GPUREG_013B 0x013B -#define GPUREG_013C 0x013C -#define GPUREG_013D 0x013D -#define GPUREG_013E 0x013E -#define GPUREG_013F 0x013F +///@name Vertex shader registers (0x2B0-0x2DF) +///@{ +#define GPUREG_VSH_BOOLUNIFORM 0x02B0 ///< Vertex shader bool uniforms. +#define GPUREG_VSH_INTUNIFORM_I0 0x02B1 ///< Vertex shader integer uniform 0. +#define GPUREG_VSH_INTUNIFORM_I1 0x02B2 ///< Vertex shader integer uniform 1. +#define GPUREG_VSH_INTUNIFORM_I2 0x02B3 ///< Vertex shader integer uniform 2. +#define GPUREG_VSH_INTUNIFORM_I3 0x02B4 ///< Vertex shader integer uniform 3. +#define GPUREG_02B5 0x02B5 ///< Unknown. +#define GPUREG_02B6 0x02B6 ///< Unknown. +#define GPUREG_02B7 0x02B7 ///< Unknown. +#define GPUREG_02B8 0x02B8 ///< Unknown. +#define GPUREG_VSH_INPUTBUFFER_CONFIG 0x02B9 ///< Vertex shader input buffer configuration. +#define GPUREG_VSH_ENTRYPOINT 0x02BA ///< Vertex shader entry point. +#define GPUREG_VSH_ATTRIBUTES_PERMUTATION_LOW 0x02BB ///< Vertex shader attribute permutations low. +#define GPUREG_VSH_ATTRIBUTES_PERMUTATION_HIGH 0x02BC ///< Vertex shader attribute permutations high. +#define GPUREG_VSH_OUTMAP_MASK 0x02BD ///< Vertex shader output map mask. +#define GPUREG_02BE 0x02BE ///< Unknown. +#define GPUREG_VSH_CODETRANSFER_END 0x02BF ///< Vertex shader code transfer end trigger. +#define GPUREG_VSH_FLOATUNIFORM_CONFIG 0x02C0 ///< Vertex shader float uniform configuration. +#define GPUREG_VSH_FLOATUNIFORM_DATA 0x02C1 ///< Vertex shader float uniform data. +#define GPUREG_02C9 0x02C9 ///< Unknown. +#define GPUREG_02CA 0x02CA ///< Unknown. +#define GPUREG_VSH_CODETRANSFER_CONFIG 0x02CB ///< Vertex shader code transfer configuration. +#define GPUREG_VSH_CODETRANSFER_DATA 0x02CC ///< Vertex shader code transfer data. +#define GPUREG_02D4 0x02D4 ///< Unknown. +#define GPUREG_VSH_OPDESCS_CONFIG 0x02D5 ///< Vertex shader operand description configuration. +#define GPUREG_VSH_OPDESCS_DATA 0x02D6 ///< Vertex shader operand description data. +#define GPUREG_02DE 0x02DE ///< Unknown. +#define GPUREG_02DF 0x02DF ///< Unknown. +///@} -//----------------------------------------------------------------------------- -// Fragment lighting registers (0x140-0x1FF) -//----------------------------------------------------------------------------- - -#define GPUREG_LIGHT0_SPECULAR0 0x0140 -#define GPUREG_LIGHT0_SPECULAR1 0x0141 -#define GPUREG_LIGHT0_DIFFUSE 0x0142 -#define GPUREG_LIGHT0_AMBIENT 0x0143 -#define GPUREG_LIGHT0_XY 0x0144 -#define GPUREG_LIGHT0_Z 0x0145 -#define GPUREG_LIGHT0_SPOTDIR_XY 0x0146 -#define GPUREG_LIGHT0_SPOTDIR_Z 0x0147 -#define GPUREG_0148 0x0148 -#define GPUREG_LIGHT0_CONFIG 0x0149 -#define GPUREG_LIGHT0_ATTENUATION_BIAS 0x014A -#define GPUREG_LIGHT0_ATTENUATION_SCALE 0x014B -#define GPUREG_014C 0x014C -#define GPUREG_014D 0x014D -#define GPUREG_014E 0x014E -#define GPUREG_014F 0x014F -#define GPUREG_LIGHT1_SPECULAR0 0x0150 -#define GPUREG_LIGHT1_SPECULAR1 0x0151 -#define GPUREG_LIGHT1_DIFFUSE 0x0152 -#define GPUREG_LIGHT1_AMBIENT 0x0153 -#define GPUREG_LIGHT1_XY 0x0154 -#define GPUREG_LIGHT1_Z 0x0155 -#define GPUREG_LIGHT1_SPOTDIR_XY 0x0156 -#define GPUREG_LIGHT1_SPOTDIR_Z 0x0157 -#define GPUREG_0158 0x0158 -#define GPUREG_LIGHT1_CONFIG 0x0159 -#define GPUREG_LIGHT1_ATTENUATION_BIAS 0x015A -#define GPUREG_LIGHT1_ATTENUATION_SCALE 0x015B -#define GPUREG_015C 0x015C -#define GPUREG_015D 0x015D -#define GPUREG_015E 0x015E -#define GPUREG_015F 0x015F -#define GPUREG_LIGHT2_SPECULAR0 0x0160 -#define GPUREG_LIGHT2_SPECULAR1 0x0161 -#define GPUREG_LIGHT2_DIFFUSE 0x0162 -#define GPUREG_LIGHT2_AMBIENT 0x0163 -#define GPUREG_LIGHT2_XY 0x0164 -#define GPUREG_LIGHT2_Z 0x0165 -#define GPUREG_LIGHT2_SPOTDIR_XY 0x0166 -#define GPUREG_LIGHT2_SPOTDIR_Z 0x0167 -#define GPUREG_0168 0x0168 -#define GPUREG_LIGHT2_CONFIG 0x0169 -#define GPUREG_LIGHT2_ATTENUATION_BIAS 0x016A -#define GPUREG_LIGHT2_ATTENUATION_SCALE 0x016B -#define GPUREG_016C 0x016C -#define GPUREG_016D 0x016D -#define GPUREG_016E 0x016E -#define GPUREG_016F 0x016F -#define GPUREG_LIGHT3_SPECULAR0 0x0170 -#define GPUREG_LIGHT3_SPECULAR1 0x0171 -#define GPUREG_LIGHT3_DIFFUSE 0x0172 -#define GPUREG_LIGHT3_AMBIENT 0x0173 -#define GPUREG_LIGHT3_XY 0x0174 -#define GPUREG_LIGHT3_Z 0x0175 -#define GPUREG_LIGHT3_SPOTDIR_XY 0x0176 -#define GPUREG_LIGHT3_SPOTDIR_Z 0x0177 -#define GPUREG_0178 0x0178 -#define GPUREG_LIGHT3_CONFIG 0x0179 -#define GPUREG_LIGHT3_ATTENUATION_BIAS 0x017A -#define GPUREG_LIGHT3_ATTENUATION_SCALE 0x017B -#define GPUREG_017C 0x017C -#define GPUREG_017D 0x017D -#define GPUREG_017E 0x017E -#define GPUREG_017F 0x017F -#define GPUREG_LIGHT4_SPECULAR0 0x0180 -#define GPUREG_LIGHT4_SPECULAR1 0x0181 -#define GPUREG_LIGHT4_DIFFUSE 0x0182 -#define GPUREG_LIGHT4_AMBIENT 0x0183 -#define GPUREG_LIGHT4_XY 0x0184 -#define GPUREG_LIGHT4_Z 0x0185 -#define GPUREG_LIGHT4_SPOTDIR_XY 0x0186 -#define GPUREG_LIGHT4_SPOTDIR_Z 0x0187 -#define GPUREG_0188 0x0188 -#define GPUREG_LIGHT4_CONFIG 0x0189 -#define GPUREG_LIGHT4_ATTENUATION_BIAS 0x018A -#define GPUREG_LIGHT4_ATTENUATION_SCALE 0x018B -#define GPUREG_018C 0x018C -#define GPUREG_018D 0x018D -#define GPUREG_018E 0x018E -#define GPUREG_018F 0x018F -#define GPUREG_LIGHT5_SPECULAR0 0x0190 -#define GPUREG_LIGHT5_SPECULAR1 0x0191 -#define GPUREG_LIGHT5_DIFFUSE 0x0192 -#define GPUREG_LIGHT5_AMBIENT 0x0193 -#define GPUREG_LIGHT5_XY 0x0194 -#define GPUREG_LIGHT5_Z 0x0195 -#define GPUREG_LIGHT5_SPOTDIR_XY 0x0196 -#define GPUREG_LIGHT5_SPOTDIR_Z 0x0197 -#define GPUREG_0198 0x0198 -#define GPUREG_LIGHT5_CONFIG 0x0199 -#define GPUREG_LIGHT5_ATTENUATION_BIAS 0x019A -#define GPUREG_LIGHT5_ATTENUATION_SCALE 0x019B -#define GPUREG_019C 0x019C -#define GPUREG_019D 0x019D -#define GPUREG_019E 0x019E -#define GPUREG_019F 0x019F -#define GPUREG_LIGHT6_SPECULAR0 0x01A0 -#define GPUREG_LIGHT6_SPECULAR1 0x01A1 -#define GPUREG_LIGHT6_DIFFUSE 0x01A2 -#define GPUREG_LIGHT6_AMBIENT 0x01A3 -#define GPUREG_LIGHT6_XY 0x01A4 -#define GPUREG_LIGHT6_Z 0x01A5 -#define GPUREG_LIGHT6_SPOTDIR_XY 0x01A6 -#define GPUREG_LIGHT6_SPOTDIR_Z 0x01A7 -#define GPUREG_01A8 0x01A8 -#define GPUREG_LIGHT6_CONFIG 0x01A9 -#define GPUREG_LIGHT6_ATTENUATION_BIAS 0x01AA -#define GPUREG_LIGHT6_ATTENUATION_SCALE 0x01AB -#define GPUREG_01AC 0x01AC -#define GPUREG_01AD 0x01AD -#define GPUREG_01AE 0x01AE -#define GPUREG_01AF 0x01AF -#define GPUREG_LIGHT7_SPECULAR0 0x01B0 -#define GPUREG_LIGHT7_SPECULAR1 0x01B1 -#define GPUREG_LIGHT7_DIFFUSE 0x01B2 -#define GPUREG_LIGHT7_AMBIENT 0x01B3 -#define GPUREG_LIGHT7_XY 0x01B4 -#define GPUREG_LIGHT7_Z 0x01B5 -#define GPUREG_LIGHT7_SPOTDIR_XY 0x01B6 -#define GPUREG_LIGHT7_SPOTDIR_Z 0x01B7 -#define GPUREG_01B8 0x01B8 -#define GPUREG_LIGHT7_CONFIG 0x01B9 -#define GPUREG_LIGHT7_ATTENUATION_BIAS 0x01BA -#define GPUREG_LIGHT7_ATTENUATION_SCALE 0x01BB -#define GPUREG_01BC 0x01BC -#define GPUREG_01BD 0x01BD -#define GPUREG_01BE 0x01BE -#define GPUREG_01BF 0x01BF -#define GPUREG_LIGHTING_AMBIENT 0x01C0 -#define GPUREG_01C1 0x01C1 -#define GPUREG_LIGHTING_NUM_LIGHTS 0x01C2 -#define GPUREG_LIGHTING_CONFIG0 0x01C3 -#define GPUREG_LIGHTING_CONFIG1 0x01C4 -#define GPUREG_LIGHTING_LUT_INDEX 0x01C5 -#define GPUREG_LIGHTING_ENABLE1 0x01C6 -#define GPUREG_01C7 0x01C7 -#define GPUREG_LIGHTING_LUT_DATA0 0x01C8 -#define GPUREG_LIGHTING_LUT_DATA1 0x01C9 -#define GPUREG_LIGHTING_LUT_DATA2 0x01CA -#define GPUREG_LIGHTING_LUT_DATA3 0x01CB -#define GPUREG_LIGHTING_LUT_DATA4 0x01CC -#define GPUREG_LIGHTING_LUT_DATA5 0x01CD -#define GPUREG_LIGHTING_LUT_DATA6 0x01CE -#define GPUREG_LIGHTING_LUT_DATA7 0x01CF -#define GPUREG_LIGHTING_LUTINPUT_ABS 0x01D0 -#define GPUREG_LIGHTING_LUTINPUT_SELECT 0x01D1 -#define GPUREG_LIGHTING_LUTINPUT_SCALE 0x01D2 -#define GPUREG_01D3 0x01D3 -#define GPUREG_01D4 0x01D4 -#define GPUREG_01D5 0x01D5 -#define GPUREG_01D6 0x01D6 -#define GPUREG_01D7 0x01D7 -#define GPUREG_01D8 0x01D8 -#define GPUREG_LIGHTING_LIGHT_PERMUTATION 0x01D9 -#define GPUREG_01DA 0x01DA -#define GPUREG_01DB 0x01DB -#define GPUREG_01DC 0x01DC -#define GPUREG_01DD 0x01DD -#define GPUREG_01DE 0x01DE -#define GPUREG_01DF 0x01DF -#define GPUREG_01E0 0x01E0 -#define GPUREG_01E1 0x01E1 -#define GPUREG_01E2 0x01E2 -#define GPUREG_01E3 0x01E3 -#define GPUREG_01E4 0x01E4 -#define GPUREG_01E5 0x01E5 -#define GPUREG_01E6 0x01E6 -#define GPUREG_01E7 0x01E7 -#define GPUREG_01E8 0x01E8 -#define GPUREG_01E9 0x01E9 -#define GPUREG_01EA 0x01EA -#define GPUREG_01EB 0x01EB -#define GPUREG_01EC 0x01EC -#define GPUREG_01ED 0x01ED -#define GPUREG_01EE 0x01EE -#define GPUREG_01EF 0x01EF -#define GPUREG_01F0 0x01F0 -#define GPUREG_01F1 0x01F1 -#define GPUREG_01F2 0x01F2 -#define GPUREG_01F3 0x01F3 -#define GPUREG_01F4 0x01F4 -#define GPUREG_01F5 0x01F5 -#define GPUREG_01F6 0x01F6 -#define GPUREG_01F7 0x01F7 -#define GPUREG_01F8 0x01F8 -#define GPUREG_01F9 0x01F9 -#define GPUREG_01FA 0x01FA -#define GPUREG_01FB 0x01FB -#define GPUREG_01FC 0x01FC -#define GPUREG_01FD 0x01FD -#define GPUREG_01FE 0x01FE -#define GPUREG_01FF 0x01FF - -//----------------------------------------------------------------------------- -// Geometry pipeline registers (0x200-0x27F) -//----------------------------------------------------------------------------- - -#define GPUREG_ATTRIBBUFFERS_LOC 0x0200 -#define GPUREG_ATTRIBBUFFERS_FORMAT_LOW 0x0201 -#define GPUREG_ATTRIBBUFFERS_FORMAT_HIGH 0x0202 -#define GPUREG_ATTRIBBUFFER0_OFFSET 0x0203 -#define GPUREG_ATTRIBBUFFER0_CONFIG1 0x0204 -#define GPUREG_ATTRIBBUFFER0_CONFIG2 0x0205 -#define GPUREG_ATTRIBBUFFER1_OFFSET 0x0206 -#define GPUREG_ATTRIBBUFFER1_CONFIG1 0x0207 -#define GPUREG_ATTRIBBUFFER1_CONFIG2 0x0208 -#define GPUREG_ATTRIBBUFFER2_OFFSET 0x0209 -#define GPUREG_ATTRIBBUFFER2_CONFIG1 0x020A -#define GPUREG_ATTRIBBUFFER2_CONFIG2 0x020B -#define GPUREG_ATTRIBBUFFER3_OFFSET 0x020C -#define GPUREG_ATTRIBBUFFER3_CONFIG1 0x020D -#define GPUREG_ATTRIBBUFFER3_CONFIG2 0x020E -#define GPUREG_ATTRIBBUFFER4_OFFSET 0x020F -#define GPUREG_ATTRIBBUFFER4_CONFIG1 0x0210 -#define GPUREG_ATTRIBBUFFER4_CONFIG2 0x0211 -#define GPUREG_ATTRIBBUFFER5_OFFSET 0x0212 -#define GPUREG_ATTRIBBUFFER5_CONFIG1 0x0213 -#define GPUREG_ATTRIBBUFFER5_CONFIG2 0x0214 -#define GPUREG_ATTRIBBUFFER6_OFFSET 0x0215 -#define GPUREG_ATTRIBBUFFER6_CONFIG1 0x0216 -#define GPUREG_ATTRIBBUFFER6_CONFIG2 0x0217 -#define GPUREG_ATTRIBBUFFER7_OFFSET 0x0218 -#define GPUREG_ATTRIBBUFFER7_CONFIG1 0x0219 -#define GPUREG_ATTRIBBUFFER7_CONFIG2 0x021A -#define GPUREG_ATTRIBBUFFER8_OFFSET 0x021B -#define GPUREG_ATTRIBBUFFER8_CONFIG1 0x021C -#define GPUREG_ATTRIBBUFFER8_CONFIG2 0x021D -#define GPUREG_ATTRIBBUFFER9_OFFSET 0x021E -#define GPUREG_ATTRIBBUFFER9_CONFIG1 0x021F -#define GPUREG_ATTRIBBUFFER9_CONFIG2 0x0220 -#define GPUREG_ATTRIBBUFFERA_OFFSET 0x0221 -#define GPUREG_ATTRIBBUFFERA_CONFIG1 0x0222 -#define GPUREG_ATTRIBBUFFERA_CONFIG2 0x0223 -#define GPUREG_ATTRIBBUFFERB_OFFSET 0x0224 -#define GPUREG_ATTRIBBUFFERB_CONFIG1 0x0225 -#define GPUREG_ATTRIBBUFFERB_CONFIG2 0x0226 -#define GPUREG_INDEXBUFFER_CONFIG 0x0227 -#define GPUREG_NUMVERTICES 0x0228 -#define GPUREG_GEOSTAGE_CONFIG 0x0229 -#define GPUREG_VERTEX_OFFSET 0x022A -#define GPUREG_022B 0x022B -#define GPUREG_022C 0x022C -#define GPUREG_022D 0x022D -#define GPUREG_DRAWARRAYS 0x022E -#define GPUREG_DRAWELEMENTS 0x022F -#define GPUREG_0230 0x0230 -#define GPUREG_0231 0x0231 -#define GPUREG_FIXEDATTRIB_INDEX 0x0232 -#define GPUREG_FIXEDATTRIB_DATA0 0x0233 -#define GPUREG_FIXEDATTRIB_DATA1 0x0234 -#define GPUREG_FIXEDATTRIB_DATA2 0x0235 -#define GPUREG_0236 0x0236 -#define GPUREG_0237 0x0237 -#define GPUREG_CMDBUF_SIZE0 0x0238 -#define GPUREG_CMDBUF_SIZE1 0x0239 -#define GPUREG_CMDBUF_ADDR0 0x023A -#define GPUREG_CMDBUF_ADDR1 0x023B -#define GPUREG_CMDBUF_JUMP0 0x023C -#define GPUREG_CMDBUF_JUMP1 0x023D -#define GPUREG_023E 0x023E -#define GPUREG_023F 0x023F -#define GPUREG_0240 0x0240 -#define GPUREG_0241 0x0241 -#define GPUREG_0242 0x0242 -#define GPUREG_0243 0x0243 -#define GPUREG_0244 0x0244 -#define GPUREG_0245 0x0245 -#define GPUREG_0246 0x0246 -#define GPUREG_0247 0x0247 -#define GPUREG_0248 0x0248 -#define GPUREG_0249 0x0249 -#define GPUREG_024A 0x024A -#define GPUREG_024B 0x024B -#define GPUREG_024C 0x024C -#define GPUREG_024D 0x024D -#define GPUREG_024E 0x024E -#define GPUREG_024F 0x024F -#define GPUREG_0250 0x0250 -#define GPUREG_0251 0x0251 -#define GPUREG_0252 0x0252 -#define GPUREG_0253 0x0253 -#define GPUREG_0254 0x0254 -#define GPUREG_0255 0x0255 -#define GPUREG_0256 0x0256 -#define GPUREG_0257 0x0257 -#define GPUREG_0258 0x0258 -#define GPUREG_0259 0x0259 -#define GPUREG_025A 0x025A -#define GPUREG_025B 0x025B -#define GPUREG_025C 0x025C -#define GPUREG_025D 0x025D -#define GPUREG_PRIMITIVE_CONFIG 0x025E -#define GPUREG_RESTART_PRIMITIVE 0x025F -#define GPUREG_0260 0x0260 -#define GPUREG_0261 0x0261 -#define GPUREG_0262 0x0262 -#define GPUREG_0263 0x0263 -#define GPUREG_0264 0x0264 -#define GPUREG_0265 0x0265 -#define GPUREG_0266 0x0266 -#define GPUREG_0267 0x0267 -#define GPUREG_0268 0x0268 -#define GPUREG_0269 0x0269 -#define GPUREG_026A 0x026A -#define GPUREG_026B 0x026B -#define GPUREG_026C 0x026C -#define GPUREG_026D 0x026D -#define GPUREG_026E 0x026E -#define GPUREG_026F 0x026F -#define GPUREG_0270 0x0270 -#define GPUREG_0271 0x0271 -#define GPUREG_0272 0x0272 -#define GPUREG_0273 0x0273 -#define GPUREG_0274 0x0274 -#define GPUREG_0275 0x0275 -#define GPUREG_0276 0x0276 -#define GPUREG_0277 0x0277 -#define GPUREG_0278 0x0278 -#define GPUREG_0279 0x0279 -#define GPUREG_027A 0x027A -#define GPUREG_027B 0x027B -#define GPUREG_027C 0x027C -#define GPUREG_027D 0x027D -#define GPUREG_027E 0x027E -#define GPUREG_027F 0x027F - -//----------------------------------------------------------------------------- -// Shader registers (0x280-0x2DF) -//----------------------------------------------------------------------------- - -// Geometry shader -#define GPUREG_GSH_BOOLUNIFORM 0x0280 -#define GPUREG_GSH_INTUNIFORM_I0 0x0281 -#define GPUREG_GSH_INTUNIFORM_I1 0x0282 -#define GPUREG_GSH_INTUNIFORM_I2 0x0283 -#define GPUREG_GSH_INTUNIFORM_I3 0x0284 -#define GPUREG_0285 0x0285 -#define GPUREG_0286 0x0286 -#define GPUREG_0287 0x0287 -#define GPUREG_0288 0x0288 -#define GPUREG_GSH_INPUTBUFFER_CONFIG 0x0289 -#define GPUREG_GSH_ENTRYPOINT 0x028A -#define GPUREG_GSH_ATTRIBUTES_PERMUTATION_LOW 0x028B -#define GPUREG_GSH_ATTRIBUTES_PERMUTATION_HIGH 0x028C -#define GPUREG_GSH_OUTMAP_MASK 0x028D -#define GPUREG_028E 0x028E -#define GPUREG_GSH_CODETRANSFER_END 0x028F -#define GPUREG_GSH_FLOATUNIFORM_CONFIG 0x0290 -#define GPUREG_GSH_FLOATUNIFORM_DATA 0x0291 -#define GPUREG_0299 0x0299 -#define GPUREG_029A 0x029A -#define GPUREG_GSH_CODETRANSFER_CONFIG 0x029B -#define GPUREG_GSH_CODETRANSFER_DATA 0x029C -#define GPUREG_02A4 0x02A4 -#define GPUREG_GSH_OPDESCS_CONFIG 0x02A5 -#define GPUREG_GSH_OPDESCS_DATA 0x02A6 -#define GPUREG_02AE 0x02AE -#define GPUREG_02AF 0x02AF - -// Vertex shader -#define GPUREG_VSH_BOOLUNIFORM 0x02B0 -#define GPUREG_VSH_INTUNIFORM_I0 0x02B1 -#define GPUREG_VSH_INTUNIFORM_I1 0x02B2 -#define GPUREG_VSH_INTUNIFORM_I2 0x02B3 -#define GPUREG_VSH_INTUNIFORM_I3 0x02B4 -#define GPUREG_02B5 0x02B5 -#define GPUREG_02B6 0x02B6 -#define GPUREG_02B7 0x02B7 -#define GPUREG_02B8 0x02B8 -#define GPUREG_VSH_INPUTBUFFER_CONFIG 0x02B9 -#define GPUREG_VSH_ENTRYPOINT 0x02BA -#define GPUREG_VSH_ATTRIBUTES_PERMUTATION_LOW 0x02BB -#define GPUREG_VSH_ATTRIBUTES_PERMUTATION_HIGH 0x02BC -#define GPUREG_VSH_OUTMAP_MASK 0x02BD -#define GPUREG_02BE 0x02BE -#define GPUREG_VSH_CODETRANSFER_END 0x02BF -#define GPUREG_VSH_FLOATUNIFORM_CONFIG 0x02C0 -#define GPUREG_VSH_FLOATUNIFORM_DATA 0x02C1 -#define GPUREG_02C9 0x02C9 -#define GPUREG_02CA 0x02CA -#define GPUREG_VSH_CODETRANSFER_CONFIG 0x02CB -#define GPUREG_VSH_CODETRANSFER_DATA 0x02CC -#define GPUREG_02D4 0x02D4 -#define GPUREG_VSH_OPDESCS_CONFIG 0x02D5 -#define GPUREG_VSH_OPDESCS_DATA 0x02D6 -#define GPUREG_02DE 0x02DE -#define GPUREG_02DF 0x02DF - -//----------------------------------------------------------------------------- -// Unknown registers (0x2E0-0x2FF) -//----------------------------------------------------------------------------- - -#define GPUREG_02E0 0x02E0 -#define GPUREG_02E1 0x02E1 -#define GPUREG_02E2 0x02E2 -#define GPUREG_02E3 0x02E3 -#define GPUREG_02E4 0x02E4 -#define GPUREG_02E5 0x02E5 -#define GPUREG_02E6 0x02E6 -#define GPUREG_02E7 0x02E7 -#define GPUREG_02E8 0x02E8 -#define GPUREG_02E9 0x02E9 -#define GPUREG_02EA 0x02EA -#define GPUREG_02EB 0x02EB -#define GPUREG_02EC 0x02EC -#define GPUREG_02ED 0x02ED -#define GPUREG_02EE 0x02EE -#define GPUREG_02EF 0x02EF -#define GPUREG_02F0 0x02F0 -#define GPUREG_02F1 0x02F1 -#define GPUREG_02F2 0x02F2 -#define GPUREG_02F3 0x02F3 -#define GPUREG_02F4 0x02F4 -#define GPUREG_02F5 0x02F5 -#define GPUREG_02F6 0x02F6 -#define GPUREG_02F7 0x02F7 -#define GPUREG_02F8 0x02F8 -#define GPUREG_02F9 0x02F9 -#define GPUREG_02FA 0x02FA -#define GPUREG_02FB 0x02FB -#define GPUREG_02FC 0x02FC -#define GPUREG_02FD 0x02FD -#define GPUREG_02FE 0x02FE -#define GPUREG_02FF 0x02FF +///@name Unknown registers (0x2E0-0x2FF) +///@{ +#define GPUREG_02E0 0x02E0 ///< Unknown. +#define GPUREG_02E1 0x02E1 ///< Unknown. +#define GPUREG_02E2 0x02E2 ///< Unknown. +#define GPUREG_02E3 0x02E3 ///< Unknown. +#define GPUREG_02E4 0x02E4 ///< Unknown. +#define GPUREG_02E5 0x02E5 ///< Unknown. +#define GPUREG_02E6 0x02E6 ///< Unknown. +#define GPUREG_02E7 0x02E7 ///< Unknown. +#define GPUREG_02E8 0x02E8 ///< Unknown. +#define GPUREG_02E9 0x02E9 ///< Unknown. +#define GPUREG_02EA 0x02EA ///< Unknown. +#define GPUREG_02EB 0x02EB ///< Unknown. +#define GPUREG_02EC 0x02EC ///< Unknown. +#define GPUREG_02ED 0x02ED ///< Unknown. +#define GPUREG_02EE 0x02EE ///< Unknown. +#define GPUREG_02EF 0x02EF ///< Unknown. +#define GPUREG_02F0 0x02F0 ///< Unknown. +#define GPUREG_02F1 0x02F1 ///< Unknown. +#define GPUREG_02F2 0x02F2 ///< Unknown. +#define GPUREG_02F3 0x02F3 ///< Unknown. +#define GPUREG_02F4 0x02F4 ///< Unknown. +#define GPUREG_02F5 0x02F5 ///< Unknown. +#define GPUREG_02F6 0x02F6 ///< Unknown. +#define GPUREG_02F7 0x02F7 ///< Unknown. +#define GPUREG_02F8 0x02F8 ///< Unknown. +#define GPUREG_02F9 0x02F9 ///< Unknown. +#define GPUREG_02FA 0x02FA ///< Unknown. +#define GPUREG_02FB 0x02FB ///< Unknown. +#define GPUREG_02FC 0x02FC ///< Unknown. +#define GPUREG_02FD 0x02FD ///< Unknown. +#define GPUREG_02FE 0x02FE ///< Unknown. +#define GPUREG_02FF 0x02FF ///< Unknown. +///@} diff --git a/libctru/include/3ds/gpu/shaderProgram.h b/libctru/include/3ds/gpu/shaderProgram.h index 7fca95c..0393107 100644 --- a/libctru/include/3ds/gpu/shaderProgram.h +++ b/libctru/include/3ds/gpu/shaderProgram.h @@ -7,42 +7,96 @@ #include <3ds/types.h> #include <3ds/gpu/shbin.h> +/// 24-bit float uniforms. typedef struct { - u32 id; - u32 data[3]; + u32 id; ///< Uniform ID. + u32 data[3]; ///< Uniform data. }float24Uniform_s; -/** - * @brief Describes an instance of either a vertex or geometry shader. - */ +/// Describes an instance of either a vertex or geometry shader. typedef struct { - DVLE_s* dvle; - u16 boolUniforms; - u32 intUniforms[4]; - float24Uniform_s* float24Uniforms; - u8 numFloat24Uniforms; + DVLE_s* dvle; ///< Shader DVLE. + u16 boolUniforms; ///< Boolean uniforms. + u32 intUniforms[4]; ///< Integer uniforms. + float24Uniform_s* float24Uniforms; ///< 24-bit float uniforms. + u8 numFloat24Uniforms; ///< Float uniform count. }shaderInstance_s; -/** - * @brief Describes an instance of a full shader program. - */ +/// Describes an instance of a full shader program. typedef struct { - shaderInstance_s* vertexShader; - shaderInstance_s* geometryShader; - u8 geometryShaderInputStride; + shaderInstance_s* vertexShader; ///< Vertex shader. + shaderInstance_s* geometryShader; ///< Geometry shader. + u8 geometryShaderInputStride; ///< Geometry shader input stride. }shaderProgram_s; +/** + * @brief Initializes a shader instance. + * @param si Shader instance to initialize. + * @param dvle DVLE to initialize the shader instance with. + */ Result shaderInstanceInit(shaderInstance_s* si, DVLE_s* dvle); + +/** + * @brief Frees a shader instance. + * @param si Shader instance to free. + */ Result shaderInstanceFree(shaderInstance_s* si); + +/** + * @brief Sets a bool uniform of a shader. + * @param si Shader instance to use. + * @param id ID of the bool uniform. + * @param value Value to set. + */ Result shaderInstanceSetBool(shaderInstance_s* si, int id, bool value); + +/** + * @brief Gets a bool uniform of a shader. + * @param si Shader instance to use. + * @param id ID of the bool uniform. + * @param value Pointer to output the value to. + */ Result shaderInstanceGetBool(shaderInstance_s* si, int id, bool* value); + +/** + * @brief Gets the location of a shader's uniform. + * @param si Shader instance to use. + * @param name Name of the uniform. + */ Result shaderInstanceGetUniformLocation(shaderInstance_s* si, const char* name); +/** + * @brief Initializes a shader program. + * @param sp Shader program to initialize. + */ Result shaderProgramInit(shaderProgram_s* sp); + +/** + * @brief Frees a shader program. + * @param sp Shader program to free. + */ Result shaderProgramFree(shaderProgram_s* sp); + +/** + * @brief Sets the vertex shader of a shader program. + * @param sp Shader program to use. + * @param dvle Vertex shader to set. + */ Result shaderProgramSetVsh(shaderProgram_s* sp, DVLE_s* dvle); + +/** + * @brief Sets the geometry shader of a shader program. + * @param sp Shader program to use. + * @param dvle Geometry shader to set. + * @param stride Stride of the geometry shader. + */ Result shaderProgramSetGsh(shaderProgram_s* sp, DVLE_s* dvle, u8 stride); + +/** + * @brief Sets the active shader program. + * @param sp Shader program to use. + */ Result shaderProgramUse(shaderProgram_s* sp); diff --git a/libctru/include/3ds/gpu/shbin.h b/libctru/include/3ds/gpu/shbin.h index b055567..d518fc9 100644 --- a/libctru/include/3ds/gpu/shbin.h +++ b/libctru/include/3ds/gpu/shbin.h @@ -1,78 +1,114 @@ +/** + * @file shbin.h + * @brief Shader binary support. + */ #pragma once #include <3ds/gpu/gpu.h> +/// DVLE type. typedef enum{ - VERTEX_SHDR=GPU_VERTEX_SHADER, - GEOMETRY_SHDR=GPU_GEOMETRY_SHADER + VERTEX_SHDR=GPU_VERTEX_SHADER, ///< Vertex shader. + GEOMETRY_SHDR=GPU_GEOMETRY_SHADER ///< Geometry shader. }DVLE_type; +/// Constant type. typedef enum{ - DVLE_CONST_BOOL=0x0, - DVLE_CONST_u8=0x1, - DVLE_CONST_FLOAT24=0x2, + DVLE_CONST_BOOL=0x0, ///< Bool. + DVLE_CONST_u8=0x1, ///< Unsigned 8-bit integer. + DVLE_CONST_FLOAT24=0x2, ///< 24-bit float. }DVLE_constantType; +/// Output attribute. typedef enum{ - RESULT_POSITION = 0x0, - RESULT_NORMALQUAT = 0x1, - RESULT_COLOR = 0x2, - RESULT_TEXCOORD0 = 0x3, - RESULT_TEXCOORD0W = 0x4, - RESULT_TEXCOORD1 = 0x5, - RESULT_TEXCOORD2 = 0x6, - RESULT_VIEW = 0x8 + RESULT_POSITION = 0x0, ///< Position. + RESULT_NORMALQUAT = 0x1, ///< Normal Quaternion. + RESULT_COLOR = 0x2, ///< Color. + RESULT_TEXCOORD0 = 0x3, ///< Texture coordinate 0. + RESULT_TEXCOORD0W = 0x4, ///< Texture coordinate 0 W. + RESULT_TEXCOORD1 = 0x5, ///< Texture coordinate 1. + RESULT_TEXCOORD2 = 0x6, ///< Texture coordinate 2. + RESULT_VIEW = 0x8 ///< View. }DVLE_outputAttribute_t; +/// DVLP data. typedef struct{ - u32 codeSize; - u32* codeData; - u32 opdescSize; - u32* opcdescData; + u32 codeSize; ///< Code size. + u32* codeData; ///< Code data. + u32 opdescSize; ///< Operand description size. + u32* opcdescData; ///< Operand description data. }DVLP_s; +/// DVLE constant entry data. typedef struct{ - u16 type; - u16 id; - u32 data[4]; + u16 type; ///< Constant type. See @ref DVLE_constantType + u16 id; ///< Constant ID. + u32 data[4]; ///< Constant data. }DVLE_constEntry_s; +/// DVLE output entry data. typedef struct{ - u16 type; - u16 regID; - u8 mask; - u8 unk[3]; + u16 type; ///< Output type. See @ref DVLE_outputAttribute_t + u16 regID; ///< Output register ID. + u8 mask; ///< Output mask. + u8 unk[3]; ///< Unknown. }DVLE_outEntry_s; +/// DVLE uniform entry data. typedef struct{ - u32 symbolOffset; - u16 startReg; - u16 endReg; + u32 symbolOffset; ///< Symbol offset. + u16 startReg; ///< Start register. + u16 endReg; ///< End register. }DVLE_uniformEntry_s; +/// DVLE data. typedef struct{ - DVLE_type type; - DVLP_s* dvlp; - u32 mainOffset, endmainOffset; - u32 constTableSize; - DVLE_constEntry_s* constTableData; - u32 outTableSize; - DVLE_outEntry_s* outTableData; - u32 uniformTableSize; - DVLE_uniformEntry_s* uniformTableData; - char* symbolTableData; - u8 outmapMask; - u32 outmapData[8]; + DVLE_type type; ///< DVLE type. + DVLP_s* dvlp; ///< Contained DVLPs. + u32 mainOffset; ///< Offset of the start of the main function. + u32 endmainOffset; ///< Offset of the end of the main function. + u32 constTableSize; ///< Constant table size. + DVLE_constEntry_s* constTableData; ///< Constant table data. + u32 outTableSize; ///< Output table size. + DVLE_outEntry_s* outTableData; ///< Output table data. + u32 uniformTableSize; ///< Uniform table size. + DVLE_uniformEntry_s* uniformTableData; ///< Uniform table data. + char* symbolTableData; ///< Symbol table data. + u8 outmapMask; ///< Output map mask. + u32 outmapData[8]; ///< Output map data. }DVLE_s; +/// DVLB data. typedef struct{ - u32 numDVLE; - DVLP_s DVLP; - DVLE_s* DVLE; + u32 numDVLE; ///< DVLE count. + DVLP_s DVLP; ///< Primary DVLP. + DVLE_s* DVLE; ///< Contained DVLE. }DVLB_s; +/** + * @brief Parses a shader binary. + * @param shbinData Shader binary data. + * @param shbinSize Shader binary size. + * @return The parsed shader binary. + */ DVLB_s* DVLB_ParseFile(u32* shbinData, u32 shbinSize); + +/** + * @brief Frees shader binary data. + * @param dvlb DVLB to free. + */ void DVLB_Free(DVLB_s* dvlb); +/** + * @brief Gets a uniform register index from a shader. + * @param dvle Shader to get the register from. + * @param name Name of the register. + * @return The uniform register index. + */ s8 DVLE_GetUniformRegister(DVLE_s* dvle, const char* name); + +/** + * @brief Generates a shader output map. + * @param dvle Shader to generate an output map for. + */ void DVLE_GenerateOutmap(DVLE_s* dvle); diff --git a/libctru/include/3ds/ndsp/channel.h b/libctru/include/3ds/ndsp/channel.h index 64d389d..72f2845 100644 --- a/libctru/include/3ds/ndsp/channel.h +++ b/libctru/include/3ds/ndsp/channel.h @@ -1,52 +1,148 @@ +/** + * @file channel.h + * @brief NDSP channels. + */ #pragma once +///@name Data types +///@{ +/// Supported NDSP encodings. enum { - NDSP_ENCODING_PCM8 = 0, - NDSP_ENCODING_PCM16, - NDSP_ENCODING_ADPCM, // DSPADPCM (GameCube format) -}; + NDSP_ENCODING_PCM8 = 0, ///< PCM8 + NDSP_ENCODING_PCM16, ///< PCM16 + NDSP_ENCODING_ADPCM, ///< DSPADPCM (GameCube format) +} NDSP_Encoding; +/// Creates a hardware channel value from a channel number. #define NDSP_CHANNELS(n) ((u32)(n) & 3) +/// Creates a hardware encoding value from an encoding type. #define NDSP_ENCODING(n) (((u32)(n) & 3) << 2) +/// NDSP playback flags. enum { - NDSP_FORMAT_MONO_PCM8 = NDSP_CHANNELS(1) | NDSP_ENCODING(NDSP_ENCODING_PCM8), - NDSP_FORMAT_MONO_PCM16 = NDSP_CHANNELS(1) | NDSP_ENCODING(NDSP_ENCODING_PCM16), - NDSP_FORMAT_MONO_ADPCM = NDSP_CHANNELS(1) | NDSP_ENCODING(NDSP_ENCODING_ADPCM), - NDSP_FORMAT_STEREO_PCM8 = NDSP_CHANNELS(2) | NDSP_ENCODING(NDSP_ENCODING_PCM8), - NDSP_FORMAT_STEREO_PCM16 = NDSP_CHANNELS(2) | NDSP_ENCODING(NDSP_ENCODING_PCM16), + NDSP_FORMAT_MONO_PCM8 = NDSP_CHANNELS(1) | NDSP_ENCODING(NDSP_ENCODING_PCM8), ///< Buffer contains Mono PCM8. + NDSP_FORMAT_MONO_PCM16 = NDSP_CHANNELS(1) | NDSP_ENCODING(NDSP_ENCODING_PCM16), ///< Buffer contains Mono PCM16. + NDSP_FORMAT_MONO_ADPCM = NDSP_CHANNELS(1) | NDSP_ENCODING(NDSP_ENCODING_ADPCM), ///< Buffer contains Mono ADPCM. + NDSP_FORMAT_STEREO_PCM8 = NDSP_CHANNELS(2) | NDSP_ENCODING(NDSP_ENCODING_PCM8), ///< Buffer contains Stereo PCM8. + NDSP_FORMAT_STEREO_PCM16 = NDSP_CHANNELS(2) | NDSP_ENCODING(NDSP_ENCODING_PCM16), ///< Buffer contains Stereo PCM16. - NDSP_FORMAT_PCM8 = NDSP_FORMAT_MONO_PCM8, - NDSP_FORMAT_PCM16 = NDSP_FORMAT_MONO_PCM16, - NDSP_FORMAT_ADPCM = NDSP_FORMAT_MONO_ADPCM, + NDSP_FORMAT_PCM8 = NDSP_FORMAT_MONO_PCM8, ///< (Alias) Buffer contains Mono PCM8. + NDSP_FORMAT_PCM16 = NDSP_FORMAT_MONO_PCM16, ///< (Alias) Buffer contains Mono PCM16. + NDSP_FORMAT_ADPCM = NDSP_FORMAT_MONO_ADPCM, ///< (Alias) Buffer contains Mono ADPCM. // Flags - NDSP_FRONT_BYPASS = BIT(4), - NDSP_3D_SURROUND_PREPROCESSED = BIT(6), //? -}; + NDSP_FRONT_BYPASS = BIT(4), ///< Front bypass. + NDSP_3D_SURROUND_PREPROCESSED = BIT(6), ///< Preprocessed 3D surround sound. +} NDSP_Flags; +///@} -// Basic channel operation +///@name Basic channel operation +///@{ +/** + * @brief Resets a channel. + * @param id ID of the channel. + */ void ndspChnReset(int id); + +/** + * @brief Initializes the parameters of a channel. + * @param id ID of the channel. + */ void ndspChnInitParams(int id); + +/** + * @brief Checks whether a channel is currently playing. + * @param id ID of the channel. + * @return Whether the channel is currently playing. + */ bool ndspChnIsPlaying(int id); + +/** + * @brief Gets the current sample position of a channel. + * @param id ID of the channel. + * @return The channel's sample position. + */ u32 ndspChnGetSamplePos(int id); + +/** + * @brief Gets the current wave buffer sequence position of a channel. + * @param id ID of the channel. + * @return The channel's wave buffer sequence position. + */ u16 ndspChnGetWaveBufSeq(int id); +///@} -// Configuration +///@name Configuration +///@{ +/** + * @brief Sets the format of a channel. + * @sa NDSP_Encoding + * @param id ID of the channel. + * @param format Format to use. + */ void ndspChnSetFormat(int id, u16 format); + +/** + * @brief Sets the linear interpolation type of a channel. + * @param id ID of the channel. + * @param type Linear interpolation type to use. + */ void ndspChnSetInterp(int id, int type); + +/** + * @brief Sets the sample rate of a channel. + * @param id ID of the channel. + * @param rate Sample rate to use. + */ void ndspChnSetRate(int id, float rate); + +/** + * @brief Sets the mix parameters of a channel. + * @param id ID of the channel. + * @param mix Mix parameters to use. + */ void ndspChnSetMix(int id, float mix[12]); + +/** + * @brief Sets the ADPCM coefficients of a channel. + * @param id ID of the channel. + * @param coefs ADPCM coefficients to use. + */ void ndspChnSetAdpcmCoefs(int id, u16 coefs[16]); +///@} -// Wave buffers +///@name Wave buffers +///@{ +/** + * @brief Clears the wave buffers of a channel. + * @param id ID of the channel. + */ void ndspChnWaveBufClear(int id); -void ndspChnWaveBufAdd(int id, ndspWaveBuf* buf); -// IIR filters +/** + * @brief Adds a wave buffer to a channel. + * @param id ID of the channel. + * @param buf Wave buffer to add. + */ +void ndspChnWaveBufAdd(int id, ndspWaveBuf* buf); +///@} + +///@name IIR filters +///@{ +/** + * @brief Sets whether the mono filter of a channel is enabled. + * @param id ID of the channel. + * @param enable Whether to enable the mono filter. + */ void ndspChnIirMonoSetEnable(int id, bool enable); // ndspChnIirMonoSetParams +/** + * @brief Sets whether the biquad filter of a channel is enabled. + * @param id ID of the channel. + * @param enable Whether to enable the biquad filter. + */ void ndspChnIirBiquadSetEnable(int id, bool enable); // ndspChnIirBiquadSetParams +///@} diff --git a/libctru/include/3ds/ndsp/ndsp.h b/libctru/include/3ds/ndsp/ndsp.h index 9100a87..06c5210 100644 --- a/libctru/include/3ds/ndsp/ndsp.h +++ b/libctru/include/3ds/ndsp/ndsp.h @@ -1,59 +1,168 @@ +/** + * @file ndsp.h + * @brief Nintendo default DSP interface. + */ #pragma once +///@name Data types +///@{ +/// ADPCM data. typedef struct { - u16 index; - s16 history0, history1; + u16 index; ///< Current sample index(?) + s16 history0; ///< First previous sample index(?) + s16 history1; ///< Second previous sample index(?) } ndspAdpcmData; +/// Wave buffer type. typedef struct tag_ndspWaveBuf ndspWaveBuf; +/// Wave buffer struct. struct tag_ndspWaveBuf { union { - s8* data_pcm8; - s16* data_pcm16; - u8* data_adpcm; - u32 data_vaddr; + s8* data_pcm8; ///< PCM8 data. + s16* data_pcm16; ///< PCM16 data. + u8* data_adpcm; ///< ADPCM data. + u32 data_vaddr; ///< Data virtual address. }; - u32 nsamples; - ndspAdpcmData* adpcm_data; + u32 nsamples; ///< Total samples. + ndspAdpcmData* adpcm_data; ///< ADPCM data. - u32 offset; // only used for capture - bool looping; - u8 padding; + u32 offset; ///< Buffer offset. Only used for capture. + bool looping; ///< Whether to loop the buffer. + u8 padding; ///< Padding. - // The following fields are used internally - u16 sequence_id; - ndspWaveBuf* next; + u16 sequence_id; ///< Sequence ID. Used internally. + ndspWaveBuf* next; ///< Next buffer. Used internally. }; +/// NDSP callback function. (data = User provided data) typedef void (*ndspCallback)(void* data); +/// NDSP auxiliary callback function. (data = User provided data, nsamples = Number of samples, samples = Sample data) typedef void (*ndspAuxCallback)(void* data, int nsamples, void* samples[4]); +///@} -// Initialization and basic operations +///@name Initialization and basic operations +///@{ +/** + * @brief Sets up the DSP component. + * @param binary DSP binary to load. + * @param size Size of the DSP binary. + * @param progMask Program RAM block mask to load the binary to. + * @param dataMask Data RAM block mask to load the binary to. + */ void ndspUseComponent(const void* binary, u32 size, u16 progMask, u16 dataMask); + +/// Initializes NDSP. Result ndspInit(void); + +/// Exits NDSP. void ndspExit(void); + +/** + * @brief Gets the number of dropped NDSP frames. + * @return The number of dropped frames. + */ u32 ndspGetDroppedFrames(void); + +/** + * @brief Gets the total NDSP frame count. + * @return The total frame count. + */ u32 ndspGetFrameCount(void); +///@} -// General parameters +///@name General parameters +///@{ +/** + * @brief Sets the master volume. + * @param volume Volume to set. Defaults to 1.0f. + */ void ndspSetMasterVol(float volume); + +/** + * @brief Sets the output mode. + * @param mode Output mode to set. Defaults to 0. + */ void ndspSetOutputMode(int mode); + +/** + * @brief Sets the clipping mode. + * @param mode Clipping mode to set. Defaults to 1. + */ void ndspSetClippingMode(int mode); + +/** + * @brief Sets the output count. + * @param count Output count to set. Defaults to 2. + */ void ndspSetOutputCount(int count); + +/** + * @brief Sets the wave buffer to capture audio to. + * @param capture Wave buffer to capture to. + */ void ndspSetCapture(ndspWaveBuf* capture); + +/** + * @brief Sets the NDSP frame callback. + * @param callback Callback to set. + * @param data User-defined data to pass to the callback. + */ void ndspSetCallback(ndspCallback callback, void* data); +///@} -// Surround +///@name Surround +///@{ +/** + * @brief Sets the surround sound depth. + * @param depth Depth to set. Defaults to 0x7FFF. + */ void ndspSurroundSetDepth(u16 depth); -void ndspSurroundSetPos(u16 pos); -void ndspSurroundSetRearRatio(u16 ratio); -// Auxiliary output +/** + * @brief Sets the surround sound position. + * @param pos Position to set. Defaults to 0. + */ +void ndspSurroundSetPos(u16 pos); + +/** + * @brief Sets the surround sound rear ratio. + * @param ratio Rear ratio to set. Defaults to 0x8000. + */ +void ndspSurroundSetRearRatio(u16 ratio); +///@} + +///@name Auxiliary output +///@{ +/** + * @brief Sets whether an auxiliary output is enabled. + * @param id ID of the auxiliary output. + * @param enable Whether to enable the auxiliary output. + */ void ndspAuxSetEnable(int id, bool enable); + +/** + * @brief Sets whether an auxiliary output should use front bypass. + * @param id ID of the auxiliary output. + * @param bypass Whether to use front bypass. + */ void ndspAuxSetFrontBypass(int id, bool bypass); + +/** + * @brief Sets the volume of an auxiliary output. + * @param id ID of the auxiliary output. + * @param volume Volume to set. + */ void ndspAuxSetVolume(int id, float volume); + +/** + * @brief Sets the NDSP frame callback of an auxiliary output. + * @param id ID of the auxiliary output. + * @param callback Callback to set. + * @param data User-defined data to pass to the callback. + */ void ndspAuxSetCallback(int id, ndspAuxCallback callback, void* data); +///@} diff --git a/libctru/include/3ds/services/apt.h b/libctru/include/3ds/services/apt.h index 155bb71..18004d7 100644 --- a/libctru/include/3ds/services/apt.h +++ b/libctru/include/3ds/services/apt.h @@ -1,11 +1,13 @@ /** * @file apt.h - * @brief APT service. + * @brief APT (Applet) service. */ #pragma once -// TODO : find a better place to put this +// TODO: find a better place to put this +/// APT workaround flag. #define RUNFLAG_APTWORKAROUND (BIT(0)) +/// APT reinititalize flag. #define RUNFLAG_APTREINIT (BIT(1)) /** @@ -165,28 +167,185 @@ void aptHook(aptHookCookie* cookie, aptHookFn callback, void* param); */ void aptUnhook(aptHookCookie* cookie); +/** + * @brief Gets an APT lock handle. + * @param flags Flags to use. + * @param lockHandle Pointer to output the lock handle to. + */ Result APT_GetLockHandle(u16 flags, Handle* lockHandle); + +/** + * @brief Initializes an application's registration with APT. + * @param appId ID of the application. + * @param eventHandle1 Pointer to output the signal event handle to. + * @param eventHandle2 Pointer to output the launch and exit event handle to. + */ Result APT_Initialize(NS_APPID appId, Handle* eventHandle1, Handle* eventHandle2); + +/** + * @brief Terminates an application's registration with APT. + * @param appID ID of the application. + */ Result APT_Finalize(NS_APPID appId); + +/// Asynchronously resets the hardware. Result APT_HardwareResetAsync(void); + +/** + * @brief Enables APT. + * @param a Parameter to enable with. + */ Result APT_Enable(u32 a); + +/** + * @brief Gets applet management info. + * @param inval Requested applet type. + * @param outval8 Pointer to output the current applet type to. + * @param outval32 Pointer to output the requested app ID to. + * @param menu_appid Pointer to output the home menu app ID to. + * @param active_appid Pointer to output the currently active app ID to. + * @param pAttributes Pointer to output the atrributes to. + */ Result APT_GetAppletManInfo(u8 inval, u8 *outval8, u32 *outval32, NS_APPID *menu_appid, NS_APPID *active_appid); + +/** + * @brief Gets an applet's information. + * @param appID ID of the applet. + * @param pProgramID Pointer to output the program ID to. + * @param pMediaType Pointer to output the media type to. + * @param pRegistered Pointer to output the registration status to. + * @param pLoadState Pointer to output the load state to. + * @param pAttributes Pointer to output the atrributes to. + */ Result APT_GetAppletInfo(NS_APPID appID, u64* pProgramID, u8* pMediaType, u8* pRegistered, u8* pLoadState, u32* pAttributes); + +/** + * @brief Gets an applet's program information. + * @param id ID of the applet. + * @param flags Flags to use when retreiving the information. + * @param titleversion Pointer to output the applet's title version to. + * + * Flags: + * - 0x01: Use AM_ListTitles with NAND media type. + * - 0x02: Use AM_ListTitles with SDMC media type. + * - 0x04: Use AM_ListTitles with GAMECARD media type. + * - 0x10: Input ID is an app ID. Must be set if 0x20 is not. + * - 0x20: Input ID is a program ID. Must be set if 0x10 is not. + * - 0x100: Sets program ID high to 0x00040000, else it is 0x00040010. Only used when 0x20 is set. + */ Result APT_GetAppletProgramInfo(u32 id, u32 flags, u16 *titleversion); + +/** + * @brief Gets the current application's program ID. + * @param pProgramID Pointer to output the program ID to. + */ Result APT_GetProgramID(u64* pProgramID); + +/// Prepares to jump to the home menu. Result APT_PrepareToJumpToHomeMenu(void); + +/** + * @brief Jumps to the home menu. + * @param param Parameters to jump with. + * @param Size of the parameter buffer. + * @param handle Handle to pass. + */ Result APT_JumpToHomeMenu(const u8 *param, size_t paramSize, Handle handle); + +/** + * @brief Prepares to jump to an application. + * @param a Application to jump to. + */ Result APT_PrepareToJumpToApplication(u32 a); + +/** + * @brief Jumps to an application. + * @param param Parameters to jump with. + * @param Size of the parameter buffer. + * @param handle Handle to pass. + */ Result APT_JumpToApplication(const u8 *param, size_t paramSize, Handle handle); + +/** + * @brief Gets whether an application is registered. + * @param appID ID of the application. + * @param out Pointer to output the registration state to. + */ Result APT_IsRegistered(NS_APPID appID, u8* out); + +/** + * @brief Inquires as to whether a signal has been received. + * @param appID ID of the application. + * @param signalType Pointer to output the signal type to. + */ Result APT_InquireNotification(u32 appID, u8* signalType); + +/** + * @brief Notifies an application to wait. + * @param appID ID of the application. + */ Result APT_NotifyToWait(NS_APPID appID); + +/** + * @brief Calls an applet utility function. + * @param out Pointer to write output data to. + * @param a Utility function to call. + * @param size1 Size of the first buffer. + * @param buf1 First buffer. + * @param size2 Size of the second buffer. + * @param buf2 Second buffer. + */ Result APT_AppletUtility(u32* out, u32 a, u32 size1, u8* buf1, u32 size2, u8* buf2); + +/** + * @brief Glances at a receieved parameter without removing it from the queue. + * @param appID ID of the application. + * @param bufferSize Size of the buffer. + * @param buffer Buffer to receive to. + * @param actualSize Pointer to output the actual received data size to. + * @param signalType Pointer to output the signal type to. + */ Result APT_GlanceParameter(NS_APPID appID, u32 bufferSize, u32* buffer, u32* actualSize, u8* signalType); + +/** + * @brief Receives a parameter. + * @param appID ID of the application. + * @param bufferSize Size of the buffer. + * @param buffer Buffer to receive to. + * @param actualSize Pointer to output the actual received data size to. + * @param signalType Pointer to output the signal type to. + */ Result APT_ReceiveParameter(NS_APPID appID, u32 bufferSize, u32* buffer, u32* actualSize, u8* signalType); + +/** + * @brief Sends a parameter. + * @param src_appID ID of the source application. + * @param dst_appID ID of the destination application. + * @param bufferSize Size of the buffer. + * @param buffer Buffer to send. + * @param paramhandle Handle to pass. + * @param signalType Signal type to send. + */ Result APT_SendParameter(NS_APPID src_appID, NS_APPID dst_appID, u32 bufferSize, u32* buffer, Handle paramhandle, u8 signalType); + +/** + * @brief Sends capture buffer information. + * @param bufferSize Size of the buffer to send. + * @param buffer Buffer to send. + */ Result APT_SendCaptureBufferInfo(u32 bufferSize, u32* buffer); + +/** + * @brief Replies to a sleep query. + * @param appID ID of the application. + * @param a Parameter to reply with. + */ Result APT_ReplySleepQuery(NS_APPID appID, u32 a); + +/** + * @brief Replies that a sleep notification has been completed. + * @param appID ID of the application. + */ Result APT_ReplySleepNotificationComplete(NS_APPID appID); /** @@ -197,9 +356,9 @@ Result APT_PrepareToCloseApplication(u8 a); /** * @brief Closes the application. - * @param param Parameter to use. + * @param param Parameters to close with. * @param paramSize Size of param. - * @param handle Handle to use. + * @param handle Handle to pass. */ Result APT_CloseApplication(const u8 *param, size_t paramSize, Handle handle); diff --git a/libctru/include/3ds/services/mic.h b/libctru/include/3ds/services/mic.h index 317c058..8efd032 100644 --- a/libctru/include/3ds/services/mic.h +++ b/libctru/include/3ds/services/mic.h @@ -10,7 +10,7 @@ * @brief Initializes MIC. * @param sharedmem Shared memory block to use. Must be 0x1000-bytes aligned. * @param sharedmem_size Size of the shared memory block to use. (audiodata size + 4, aligned to 0x1000-bytes) - * @param control Control. TODO: Document parameter. + * @param control Control value. Bits 0-6 = Amplification. * @param unk0 Unknown. Typically 3. * @param unk1 Unknown. Typically 1. * @param unk2 Unknown. Typically 1. @@ -72,12 +72,14 @@ Result MIC_GetEventHandle(Handle *handle); /** * Sets the control value. + * @note Bits 0-6 = Amplification. * @param value Control value to set. */ Result MIC_SetControl(u8 value); /** * Gets the control value. + * @note Bits 0-6 = Amplification. * @param value Pointer to output the control value to. */ Result MIC_GetControl(u8 *value);