111 lines
4.8 KiB
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111 lines
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<div id="projectname">libctru
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 <span id="projectnumber">v2.4.1</span>
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<p>Sets the parallax barrier's mask pattern and polarity phase (12+1 bits).</p><pre class="fragment"> Bit11 to 0 correspond to a repeating barrier mask pattern, 0 meaning the corresponding mask unit is
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transparent and 1 that it is opaque. The direction is: left->right corresponds to MSB->LSB.
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Bit12 is the polarity bit.
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QTM's expander management thread repeatedly writes (on every loop iteration) the current mask pattern
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plus polarity bit, whether it is normally set or overridden by `qtm:c`, then on the following set,
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negates both (it writes pattern ^ 0x1FFF). This is done at all times, even it 2D mode.
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The register being written to are regId 0x02 and 0x03 (output ports).
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TI TCA6416A I2C->Parallel expander is located on bus I2C1 (PA 0x10161000) device ID 0x40.
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This function has no effect on N2DSXL.
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</pre> <dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">pattern</td><td>Barrier mask pattern (bit12: polarity, bit11-0: 12-bit mask pattern) </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd><code>0xD82183F8</code> if API not started, otherwise 0 (success). </dd></dl>
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<dl class="section see"><dt>See also</dt><dd>Patent US20030234980A1 for a description of parallax barriers. mask pattern used for super-stable 3D are as follows (position 0 to 11): <pre class="fragment"> 000011111100
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000001111110
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000000111111
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100000011111
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110000001111
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111000000111
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111100000011
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111110000001
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111111000000
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011111100000
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001111110000
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000111111000
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</pre> When SS3D is disabled (ie. it tries to match O3DS behavior), then pattern becomes: 111100000111 Notice that the slit width is reduced from 6 to 5 units there.</dd></dl>
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<p>For 2D it is all-zero: 000000000000</p>
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<p>2D pattern is automatically set on QTM process init and exit.</p>
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