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TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16.

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bunnei
2016-08-12 13:42:16 -04:00
committed by MerryMage
parent 4b09c0d032
commit 8e68e6fdd9
7 changed files with 79 additions and 11 deletions
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16
src/frontend/disassembler/disassembler_arm.cpp
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@@ -666,23 +666,31 @@ public:
std::string arm_QADD8(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("qadd8%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_QADD16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_QADD16(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("qadd16%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_QASX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_QSAX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_QSUB8(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("qsub8%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_QSUB16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_QSUB16(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("qsub16%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_UQADD8(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("uqadd8%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_UQADD16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_UQADD16(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("uqadd16%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_UQASX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_UQSAX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_UQSUB8(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("uqsub8%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
std::string arm_UQSUB16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }
std::string arm_UQSUB16(Cond cond, Reg n, Reg d, Reg m) {
return Common::StringFromFormat("uqsub16%s %s, %s, %s", CondToString(cond), RegToString(d), RegToString(n), RegToString(m));
}
// Parallel Add/Subtract (Halving) instructions
std::string arm_SHADD8(Cond cond, Reg n, Reg d, Reg m) { return "ice"; }