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IR: Initial implementation of FP{Double,Single}ToFixed{S,U}{32,64}
This implementation just falls-back to the software floating point implementation.
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@@ -163,6 +163,7 @@ u32 A32JitState::Fpscr() const {
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FPSCR |= (guest_MXCSR & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE
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FPSCR |= FPSCR_IDC;
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FPSCR |= FPSCR_UFC;
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FPSCR |= fpsr_exc;
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return FPSCR;
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}
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@@ -183,13 +184,10 @@ void A32JitState::SetFpscr(u32 FPSCR) {
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const std::array<u32, 4> MXCSR_RMode {0x0, 0x4000, 0x2000, 0x6000};
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guest_MXCSR |= MXCSR_RMode[(FPSCR >> 22) & 0x3];
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// Cumulative flags IOC, IXC, UFC, OFC, DZC
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guest_MXCSR |= ( FPSCR ) & 0b0000000000001; // IE = IOC
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guest_MXCSR |= ( FPSCR << 1) & 0b0000000111100; // PE, UE, OE, ZE = IXC, UFC, OFC, DZC
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// Cumulative flag IDC, UFC
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FPSCR_IDC = FPSCR & (1 << 7);
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FPSCR_UFC = FPSCR & (1 << 3);
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// Cumulative flags IDC, IOC, IXC, UFC, OFC, DZC
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FPSCR_IDC = 0;
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FPSCR_UFC = 0;
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fpsr_exc = FPSCR & 0x9F;
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if (Common::Bit<24>(FPSCR)) {
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// VFP Flush to Zero
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