Lioncash fb30922cd1 thumb32: Add supporting decoder entry for PLD (literal) ...

LDRH (literal)'s pseduocode indicates that cases where Rt specifies the
PC, that the instruction should be execured as if it were a PLD
instruction.

Curiously, however, within the ARM reference manual, the encodings in the case
that happens doesn't match up.

The bit pattern for LDRH (literal) has bit 21 set to 1, but the encoding
of PLD (literal) has bit 21 set to zero for it's only thumb encoding.

2021-03-09 18:16:08 -05:00

..

arm.h

Relicense to 0BSD

2020-04-23 15:45:57 +01:00

arm.inc

A32: ARMv8: Implement LDA{,EX}{,B,D,H} and STL{,EX}{,B,D,H}

2020-05-15 21:07:36 +01:00

asimd.h

A32/ASIMD: Ensure decoder table is correct

2020-07-05 18:45:42 +01:00

asimd.inc

A32/ASIMD: Ensure decoder table is correct

2020-07-05 18:45:42 +01:00

thumb16.h

A32/decode: Split thumb16

2021-02-06 21:25:24 +00:00

thumb16.inc

A32/thumb16: Implement IT instruction

2021-02-07 20:41:48 +00:00

thumb32.h

A32/decode: Split thumb32

2021-02-06 21:26:42 +00:00

thumb32.inc

thumb32: Add supporting decoder entry for PLD (literal)

2021-03-09 18:16:08 -05:00

vfp.h

vfp: Add decoders for VFPv5

2020-06-19 19:24:32 +01:00

vfp.inc

A32: Implement VFPv5 VRINTX

2020-06-24 22:31:58 +01:00