Lioncash b97358075e simd_scalar_two_register_misc: Handle 64-bit case in SCVTF and UCVTF's scalar double/single-precision variant ...

Avoids falling back to the interpreter in the 64-bit case.

2020-04-22 20:46:18 +01:00

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decoder

A64: Implement FACGE's vector single/double precision variants

2020-04-22 20:46:18 +01:00

translate

simd_scalar_two_register_misc: Handle 64-bit case in SCVTF and UCVTF's scalar double/single-precision variant

2020-04-22 20:46:18 +01:00

FPCR.h

General: Convert multiple namespace specifiers to nested namespace specifiers where applicable

2020-04-22 20:44:38 +01:00

imm.h

imm: Add additional bit position checks to Imm::Bits

2020-04-22 20:46:16 +01:00

ir_emitter.cpp

A64: Implement system register TPIDR_EL0

2020-04-22 20:46:15 +01:00

ir_emitter.h

A64: Implement system register TPIDR_EL0

2020-04-22 20:46:15 +01:00

location_descriptor.cpp

General: Convert multiple namespace specifiers to nested namespace specifiers where applicable

2020-04-22 20:44:38 +01:00

location_descriptor.h

General: Convert multiple namespace specifiers to nested namespace specifiers where applicable

2020-04-22 20:44:38 +01:00

types.cpp

General: Convert multiple namespace specifiers to nested namespace specifiers where applicable

2020-04-22 20:44:38 +01:00

types.h

General: Convert multiple namespace specifiers to nested namespace specifiers where applicable

2020-04-22 20:44:38 +01:00