or1k: Fix ICE in libgcc caused by recent validate_subreg changes

After commit eb2ea476db ("emit-rtl: Allow extra checks for
paradoxical subregs [PR119966]") paradoxical subregs or the OpenRISC
condition flag register (reg:BI sr_f) are no longer allowed.

This causes and ICE in the ce1 pass which tries to get the or1k flag
register into an SI register, which is no longer possible.

Adjust or1k_can_change_mode_class to allow changing the or1k flag reg to
SI mode which in turn allows paradoxical subregs to be generated again.

gcc/ChangeLog:

	PR target/120587
	* config/or1k/or1k.cc (or1k_can_change_mode_class): Allow
	changing flags mode from BI to SI to allow for paradoxical
	subregs.
This commit is contained in:
Stafford Horne
2025-06-07 14:46:30 +01:00
parent 8fa1e98493
commit c0694f95f5

View File

@@ -1408,8 +1408,9 @@ static bool
or1k_can_change_mode_class (machine_mode from, machine_mode to,
reg_class_t rclass)
{
/* Allow cnoverting special flags to SI mode subregs. */
if (rclass == FLAG_REGS)
return from == to;
return from == to || (from == BImode && to == SImode);
return true;
}