diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index 97fd9516959..019630eb8d2 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -9877,12 +9877,12 @@
 ;; instead and about the ptest.
 (define_expand "<optab><mode>"
   [(set (pc)
-	(unspec:SVE_I
+	(unspec:SVE_FULL_I
 	  [(if_then_else
 	    (match_operator 0 "aarch64_comparison_operator"
 	      [(match_operand:<VPRED> 1 "register_operand")
-	       (match_operand:SVE_I 2 "register_operand")
-	       (match_operand:SVE_I 3 "aarch64_simd_reg_or_zero")])
+	       (match_operand:SVE_FULL_I 2 "register_operand")
+	       (match_operand:SVE_FULL_I 3 "aarch64_simd_reg_or_zero")])
 	    (label_ref (match_operand 4 ""))
 	    (pc))]
 	 COND_CBRANCH_CMP))]
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vect-early-break-cbranch_16.c b/gcc/testsuite/gcc.target/aarch64/sve/vect-early-break-cbranch_16.c
new file mode 100644
index 00000000000..9bb251f5f47
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/vect-early-break-cbranch_16.c
@@ -0,0 +1,22 @@
+/* { dg-do run { target aarch64_sve_hw } } */
+/* { dg-options "-Ofast --param aarch64-autovec-preference=sve-only" } */
+/* { dg-require-effective-target lp64 } */
+
+char b = 41;
+int main() {
+  signed char a[31];
+#pragma GCC novector
+  for (int c = 0; c < 31; ++c)
+    a[c] = c * c + c % 5;
+  {
+    signed char *d = a;
+#pragma GCC novector
+    for (int c = 0; c < 31; ++c, b += -16)
+      d[c] += b;
+  }
+  for (int c = 0; c < 31; ++c) {
+    signed char e = c * c + c % 5 + 41 + c * -16;
+    if (a[c] != e)
+      __builtin_abort();
+  }
+}