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Sync register names with 3dbrew wiki

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This commit is contained in:
fincs 2015-09-07 19:31:02 +02:00
parent c594170fca
commit fded98b9ed
3 changed files with 140 additions and 98 deletions
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190
libctru/include/3ds/gpu/registers.h
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@ -1,5 +1,9 @@
#pragma once #pragma once
//-----------------------------------------------------------------------------
// Miscellaneous registers (0x000-0x03F)
//-----------------------------------------------------------------------------
#define GPUREG_0000 0x0000 #define GPUREG_0000 0x0000
#define GPUREG_0001 0x0001 #define GPUREG_0001 0x0001
#define GPUREG_0002 0x0002 #define GPUREG_0002 0x0002
@ -64,11 +68,16 @@
#define GPUREG_003D 0x003D #define GPUREG_003D 0x003D
#define GPUREG_003E 0x003E #define GPUREG_003E 0x003E
#define GPUREG_003F 0x003F #define GPUREG_003F 0x003F
//-----------------------------------------------------------------------------
// Rasterizer registers (0x040-0x07F)
//-----------------------------------------------------------------------------
#define GPUREG_FACECULLING_CONFIG 0x0040 #define GPUREG_FACECULLING_CONFIG 0x0040
#define GPUREG_0041 0x0041 #define GPUREG_VIEWPORT_WIDTH 0x0041
#define GPUREG_0042 0x0042 #define GPUREG_VIEWPORT_INVW 0x0042
#define GPUREG_0043 0x0043 #define GPUREG_VIEWPORT_HEIGHT 0x0043
#define GPUREG_0044 0x0044 #define GPUREG_VIEWPORT_INVH 0x0044
#define GPUREG_0045 0x0045 #define GPUREG_0045 0x0045
#define GPUREG_0046 0x0046 #define GPUREG_0046 0x0046
#define GPUREG_0047 0x0047 #define GPUREG_0047 0x0047
@ -104,13 +113,13 @@
#define GPUREG_SCISSORTEST_MODE 0x0065 #define GPUREG_SCISSORTEST_MODE 0x0065
#define GPUREG_SCISSORTEST_POS 0x0066 #define GPUREG_SCISSORTEST_POS 0x0066
#define GPUREG_SCISSORTEST_DIM 0x0067 #define GPUREG_SCISSORTEST_DIM 0x0067
#define GPUREG_0068 0x0068 #define GPUREG_VIEWPORT_XY 0x0068
#define GPUREG_0069 0x0069 #define GPUREG_0069 0x0069
#define GPUREG_006A 0x006A #define GPUREG_006A 0x006A
#define GPUREG_006B 0x006B #define GPUREG_006B 0x006B
#define GPUREG_006C 0x006C #define GPUREG_006C 0x006C
#define GPUREG_006D 0x006D #define GPUREG_006D 0x006D
#define GPUREG_006E 0x006E #define GPUREG_FRAMEBUFFER_DIM2 0x006E
#define GPUREG_006F 0x006F #define GPUREG_006F 0x006F
#define GPUREG_0070 0x0070 #define GPUREG_0070 0x0070
#define GPUREG_0071 0x0071 #define GPUREG_0071 0x0071
@ -128,7 +137,12 @@
#define GPUREG_007D 0x007D #define GPUREG_007D 0x007D
#define GPUREG_007E 0x007E #define GPUREG_007E 0x007E
#define GPUREG_007F 0x007F #define GPUREG_007F 0x007F
#define GPUREG_TEXUNITS_CONFIG 0x0080
//-----------------------------------------------------------------------------
// Texturing registers (0x080-0x0FF)
//-----------------------------------------------------------------------------
#define GPUREG_TEXUNIT_ENABLE 0x0080
#define GPUREG_TEXUNIT0_BORDER_COLOR 0x0081 #define GPUREG_TEXUNIT0_BORDER_COLOR 0x0081
#define GPUREG_TEXUNIT0_DIM 0x0082 #define GPUREG_TEXUNIT0_DIM 0x0082
#define GPUREG_TEXUNIT0_PARAM 0x0083 #define GPUREG_TEXUNIT0_PARAM 0x0083
@ -192,39 +206,39 @@
#define GPUREG_00BD 0x00BD #define GPUREG_00BD 0x00BD
#define GPUREG_00BE 0x00BE #define GPUREG_00BE 0x00BE
#define GPUREG_00BF 0x00BF #define GPUREG_00BF 0x00BF
#define GPUREG_TEXENV0_CONFIG0 0x00C0 #define GPUREG_TEXENV0_SOURCE 0x00C0
#define GPUREG_TEXENV0_CONFIG1 0x00C1 #define GPUREG_TEXENV0_OPERAND 0x00C1
#define GPUREG_TEXENV0_CONFIG2 0x00C2 #define GPUREG_TEXENV0_COMBINER 0x00C2
#define GPUREG_TEXENV0_CONFIG3 0x00C3 #define GPUREG_TEXENV0_COLOR 0x00C3
#define GPUREG_TEXENV0_CONFIG4 0x00C4 #define GPUREG_TEXENV0_SCALE 0x00C4
#define GPUREG_00C5 0x00C5 #define GPUREG_00C5 0x00C5
#define GPUREG_00C6 0x00C6 #define GPUREG_00C6 0x00C6
#define GPUREG_00C7 0x00C7 #define GPUREG_00C7 0x00C7
#define GPUREG_TEXENV1_CONFIG0 0x00C8 #define GPUREG_TEXENV1_SOURCE 0x00C8
#define GPUREG_TEXENV1_CONFIG1 0x00C9 #define GPUREG_TEXENV1_OPERAND 0x00C9
#define GPUREG_TEXENV1_CONFIG2 0x00CA #define GPUREG_TEXENV1_COMBINER 0x00CA
#define GPUREG_TEXENV1_CONFIG3 0x00CB #define GPUREG_TEXENV1_COLOR 0x00CB
#define GPUREG_TEXENV1_CONFIG4 0x00CC #define GPUREG_TEXENV1_SCALE 0x00CC
#define GPUREG_00CD 0x00CD #define GPUREG_00CD 0x00CD
#define GPUREG_00CE 0x00CE #define GPUREG_00CE 0x00CE
#define GPUREG_00CF 0x00CF #define GPUREG_00CF 0x00CF
#define GPUREG_TEXENV2_CONFIG0 0x00D0 #define GPUREG_TEXENV2_SOURCE 0x00D0
#define GPUREG_TEXENV2_CONFIG1 0x00D1 #define GPUREG_TEXENV2_OPERAND 0x00D1
#define GPUREG_TEXENV2_CONFIG2 0x00D2 #define GPUREG_TEXENV2_COMBINER 0x00D2
#define GPUREG_TEXENV2_CONFIG3 0x00D3 #define GPUREG_TEXENV2_COLOR 0x00D3
#define GPUREG_TEXENV2_CONFIG4 0x00D4 #define GPUREG_TEXENV2_SCALE 0x00D4
#define GPUREG_00D5 0x00D5 #define GPUREG_00D5 0x00D5
#define GPUREG_00D6 0x00D6 #define GPUREG_00D6 0x00D6
#define GPUREG_00D7 0x00D7 #define GPUREG_00D7 0x00D7
#define GPUREG_TEXENV3_CONFIG0 0x00D8 #define GPUREG_TEXENV3_SOURCE 0x00D8
#define GPUREG_TEXENV3_CONFIG1 0x00D9 #define GPUREG_TEXENV3_OPERAND 0x00D9
#define GPUREG_TEXENV3_CONFIG2 0x00DA #define GPUREG_TEXENV3_COMBINER 0x00DA
#define GPUREG_TEXENV3_CONFIG3 0x00DB #define GPUREG_TEXENV3_COLOR 0x00DB
#define GPUREG_TEXENV3_CONFIG4 0x00DC #define GPUREG_TEXENV3_SCALE 0x00DC
#define GPUREG_00DD 0x00DD #define GPUREG_00DD 0x00DD
#define GPUREG_00DE 0x00DE #define GPUREG_00DE 0x00DE
#define GPUREG_00DF 0x00DF #define GPUREG_00DF 0x00DF
#define GPUREG_TEXENV_BUFFER_CONFIG 0x00E0 #define GPUREG_TEXENV_UPDATE_BUFFER 0x00E0
#define GPUREG_00E1 0x00E1 #define GPUREG_00E1 0x00E1
#define GPUREG_00E2 0x00E2 #define GPUREG_00E2 0x00E2
#define GPUREG_00E3 0x00E3 #define GPUREG_00E3 0x00E3
@ -240,29 +254,34 @@
#define GPUREG_00ED 0x00ED #define GPUREG_00ED 0x00ED
#define GPUREG_00EE 0x00EE #define GPUREG_00EE 0x00EE
#define GPUREG_00EF 0x00EF #define GPUREG_00EF 0x00EF
#define GPUREG_TEXENV4_CONFIG0 0x00F0 #define GPUREG_TEXENV4_SOURCE 0x00F0
#define GPUREG_TEXENV4_CONFIG1 0x00F1 #define GPUREG_TEXENV4_OPERAND 0x00F1
#define GPUREG_TEXENV4_CONFIG2 0x00F2 #define GPUREG_TEXENV4_COMBINER 0x00F2
#define GPUREG_TEXENV4_CONFIG3 0x00F3 #define GPUREG_TEXENV4_COLOR 0x00F3
#define GPUREG_TEXENV4_CONFIG4 0x00F4 #define GPUREG_TEXENV4_SCALE 0x00F4
#define GPUREG_00F5 0x00F5 #define GPUREG_00F5 0x00F5
#define GPUREG_00F6 0x00F6 #define GPUREG_00F6 0x00F6
#define GPUREG_00F7 0x00F7 #define GPUREG_00F7 0x00F7
#define GPUREG_TEXENV5_CONFIG0 0x00F8 #define GPUREG_TEXENV5_SOURCE 0x00F8
#define GPUREG_TEXENV5_CONFIG1 0x00F9 #define GPUREG_TEXENV5_OPERAND 0x00F9
#define GPUREG_TEXENV5_CONFIG2 0x00FA #define GPUREG_TEXENV5_COMBINER 0x00FA
#define GPUREG_TEXENV5_CONFIG3 0x00FB #define GPUREG_TEXENV5_COLOR 0x00FB
#define GPUREG_TEXENV5_CONFIG4 0x00FC #define GPUREG_TEXENV5_SCALE 0x00FC
#define GPUREG_TEXENV_BUFFER_COLOR 0x00FD #define GPUREG_TEXENV_BUFFER_COLOR 0x00FD
#define GPUREG_00FE 0x00FE #define GPUREG_00FE 0x00FE
#define GPUREG_00FF 0x00FF #define GPUREG_00FF 0x00FF
#define GPUREG_COLOROUTPUT_CONFIG 0x0100
//-----------------------------------------------------------------------------
// Framebuffer registers (0x100-0x13F)
//-----------------------------------------------------------------------------
#define GPUREG_BLEND_ENABLE 0x0100
#define GPUREG_BLEND_CONFIG 0x0101 #define GPUREG_BLEND_CONFIG 0x0101
#define GPUREG_COLORLOGICOP_CONFIG 0x0102 #define GPUREG_LOGICOP_CONFIG 0x0102
#define GPUREG_BLEND_COLOR 0x0103 #define GPUREG_BLEND_COLOR 0x0103
#define GPUREG_ALPHATEST_CONFIG 0x0104 #define GPUREG_ALPHATEST_CONFIG 0x0104
#define GPUREG_STENCILTEST_CONFIG 0x0105 #define GPUREG_STENCIL_TEST 0x0105
#define GPUREG_STENCILOP_CONFIG 0x0106 #define GPUREG_STENCIL_ACTION 0x0106
#define GPUREG_DEPTHTEST_CONFIG 0x0107 #define GPUREG_DEPTHTEST_CONFIG 0x0107
#define GPUREG_0108 0x0108 #define GPUREG_0108 0x0108
#define GPUREG_0109 0x0109 #define GPUREG_0109 0x0109
@ -272,21 +291,21 @@
#define GPUREG_010D 0x010D #define GPUREG_010D 0x010D
#define GPUREG_010E 0x010E #define GPUREG_010E 0x010E
#define GPUREG_010F 0x010F #define GPUREG_010F 0x010F
#define GPUREG_0110 0x0110 #define GPUREG_FRAMEBUFFER_INVALIDATE 0x0110
#define GPUREG_0111 0x0111 #define GPUREG_FRAMEBUFFER_FLUSH 0x0111
#define GPUREG_0112 0x0112 #define GPUREG_COLORBUFFER_READ 0x0112
#define GPUREG_0113 0x0113 #define GPUREG_COLORBUFFER_WRITE 0x0113
#define GPUREG_0114 0x0114 #define GPUREG_DEPTHBUFFER_READ 0x0114
#define GPUREG_0115 0x0115 #define GPUREG_DEPTHBUFFER_WRITE 0x0115
#define GPUREG_DEPTHBUFFER_FORMAT 0x0116 #define GPUREG_DEPTHBUFFER_FORMAT 0x0116
#define GPUREG_COLORBUFFER_FORMAT 0x0117 #define GPUREG_COLORBUFFER_FORMAT 0x0117
#define GPUREG_0118 0x0118 #define GPUREG_0118 0x0118
#define GPUREG_0119 0x0119 #define GPUREG_0119 0x0119
#define GPUREG_011A 0x011A #define GPUREG_011A 0x011A
#define GPUREG_011B 0x011B #define GPUREG_FRAMEBUFFER_BLOCK32 0x011B
#define GPUREG_DEPTHBUFFER_LOC 0x011C #define GPUREG_DEPTHBUFFER_LOC 0x011C
#define GPUREG_COLORBUFFER_LOC 0x011D #define GPUREG_COLORBUFFER_LOC 0x011D
#define GPUREG_OUTBUFFER_DIM 0x011E #define GPUREG_FRAMEBUFFER_DIM 0x011E
#define GPUREG_011F 0x011F #define GPUREG_011F 0x011F
#define GPUREG_0120 0x0120 #define GPUREG_0120 0x0120
#define GPUREG_0121 0x0121 #define GPUREG_0121 0x0121
@ -320,6 +339,11 @@
#define GPUREG_013D 0x013D #define GPUREG_013D 0x013D
#define GPUREG_013E 0x013E #define GPUREG_013E 0x013E
#define GPUREG_013F 0x013F #define GPUREG_013F 0x013F
//-----------------------------------------------------------------------------
// Fragment lighting registers (0x140-0x1FF)
//-----------------------------------------------------------------------------
#define GPUREG_0140 0x0140 #define GPUREG_0140 0x0140
#define GPUREG_0141 0x0141 #define GPUREG_0141 0x0141
#define GPUREG_0142 0x0142 #define GPUREG_0142 0x0142
@ -512,49 +536,54 @@
#define GPUREG_01FD 0x01FD #define GPUREG_01FD 0x01FD
#define GPUREG_01FE 0x01FE #define GPUREG_01FE 0x01FE
#define GPUREG_01FF 0x01FF #define GPUREG_01FF 0x01FF
//-----------------------------------------------------------------------------
// Geometry pipeline registers (0x200-0x27F)
//-----------------------------------------------------------------------------
#define GPUREG_ATTRIBBUFFERS_LOC 0x0200 #define GPUREG_ATTRIBBUFFERS_LOC 0x0200
#define GPUREG_ATTRIBBUFFERS_FORMAT_LOW 0x0201 #define GPUREG_ATTRIBBUFFERS_FORMAT_LOW 0x0201
#define GPUREG_ATTRIBBUFFERS_FORMAT_HIGH 0x0202 #define GPUREG_ATTRIBBUFFERS_FORMAT_HIGH 0x0202
#define GPUREG_ATTRIBBUFFER0_CONFIG0 0x0203 #define GPUREG_ATTRIBBUFFER0_OFFSET 0x0203
#define GPUREG_ATTRIBBUFFER0_CONFIG1 0x0204 #define GPUREG_ATTRIBBUFFER0_CONFIG1 0x0204
#define GPUREG_ATTRIBBUFFER0_CONFIG2 0x0205 #define GPUREG_ATTRIBBUFFER0_CONFIG2 0x0205
#define GPUREG_ATTRIBBUFFER1_CONFIG0 0x0206 #define GPUREG_ATTRIBBUFFER1_OFFSET 0x0206
#define GPUREG_ATTRIBBUFFER1_CONFIG1 0x0207 #define GPUREG_ATTRIBBUFFER1_CONFIG1 0x0207
#define GPUREG_ATTRIBBUFFER1_CONFIG2 0x0208 #define GPUREG_ATTRIBBUFFER1_CONFIG2 0x0208
#define GPUREG_ATTRIBBUFFER2_CONFIG0 0x0209 #define GPUREG_ATTRIBBUFFER2_OFFSET 0x0209
#define GPUREG_ATTRIBBUFFER2_CONFIG1 0x020A #define GPUREG_ATTRIBBUFFER2_CONFIG1 0x020A
#define GPUREG_ATTRIBBUFFER2_CONFIG2 0x020B #define GPUREG_ATTRIBBUFFER2_CONFIG2 0x020B
#define GPUREG_ATTRIBBUFFER3_CONFIG0 0x020C #define GPUREG_ATTRIBBUFFER3_OFFSET 0x020C
#define GPUREG_ATTRIBBUFFER3_CONFIG1 0x020D #define GPUREG_ATTRIBBUFFER3_CONFIG1 0x020D
#define GPUREG_ATTRIBBUFFER3_CONFIG2 0x020E #define GPUREG_ATTRIBBUFFER3_CONFIG2 0x020E
#define GPUREG_ATTRIBBUFFER4_CONFIG0 0x020F #define GPUREG_ATTRIBBUFFER4_OFFSET 0x020F
#define GPUREG_ATTRIBBUFFER4_CONFIG1 0x0210 #define GPUREG_ATTRIBBUFFER4_CONFIG1 0x0210
#define GPUREG_ATTRIBBUFFER4_CONFIG2 0x0211 #define GPUREG_ATTRIBBUFFER4_CONFIG2 0x0211
#define GPUREG_ATTRIBBUFFER5_CONFIG0 0x0212 #define GPUREG_ATTRIBBUFFER5_OFFSET 0x0212
#define GPUREG_ATTRIBBUFFER5_CONFIG1 0x0213 #define GPUREG_ATTRIBBUFFER5_CONFIG1 0x0213
#define GPUREG_ATTRIBBUFFER5_CONFIG2 0x0214 #define GPUREG_ATTRIBBUFFER5_CONFIG2 0x0214
#define GPUREG_ATTRIBBUFFER6_CONFIG0 0x0215 #define GPUREG_ATTRIBBUFFER6_OFFSET 0x0215
#define GPUREG_ATTRIBBUFFER6_CONFIG1 0x0216 #define GPUREG_ATTRIBBUFFER6_CONFIG1 0x0216
#define GPUREG_ATTRIBBUFFER6_CONFIG2 0x0217 #define GPUREG_ATTRIBBUFFER6_CONFIG2 0x0217
#define GPUREG_ATTRIBBUFFER7_CONFIG0 0x0218 #define GPUREG_ATTRIBBUFFER7_OFFSET 0x0218
#define GPUREG_ATTRIBBUFFER7_CONFIG1 0x0219 #define GPUREG_ATTRIBBUFFER7_CONFIG1 0x0219
#define GPUREG_ATTRIBBUFFER7_CONFIG2 0x021A #define GPUREG_ATTRIBBUFFER7_CONFIG2 0x021A
#define GPUREG_ATTRIBBUFFER8_CONFIG0 0x021B #define GPUREG_ATTRIBBUFFER8_OFFSET 0x021B
#define GPUREG_ATTRIBBUFFER8_CONFIG1 0x021C #define GPUREG_ATTRIBBUFFER8_CONFIG1 0x021C
#define GPUREG_ATTRIBBUFFER8_CONFIG2 0x021D #define GPUREG_ATTRIBBUFFER8_CONFIG2 0x021D
#define GPUREG_ATTRIBBUFFER9_CONFIG0 0x021E #define GPUREG_ATTRIBBUFFER9_OFFSET 0x021E
#define GPUREG_ATTRIBBUFFER9_CONFIG1 0x021F #define GPUREG_ATTRIBBUFFER9_CONFIG1 0x021F
#define GPUREG_ATTRIBBUFFER9_CONFIG2 0x0220 #define GPUREG_ATTRIBBUFFER9_CONFIG2 0x0220
#define GPUREG_ATTRIBBUFFERA_CONFIG0 0x0221 #define GPUREG_ATTRIBBUFFERA_OFFSET 0x0221
#define GPUREG_ATTRIBBUFFERA_CONFIG1 0x0222 #define GPUREG_ATTRIBBUFFERA_CONFIG1 0x0222
#define GPUREG_ATTRIBBUFFERA_CONFIG2 0x0223 #define GPUREG_ATTRIBBUFFERA_CONFIG2 0x0223
#define GPUREG_ATTRIBBUFFERB_CONFIG0 0x0224 #define GPUREG_ATTRIBBUFFERB_OFFSET 0x0224
#define GPUREG_ATTRIBBUFFERB_CONFIG1 0x0225 #define GPUREG_ATTRIBBUFFERB_CONFIG1 0x0225
#define GPUREG_ATTRIBBUFFERB_CONFIG2 0x0226 #define GPUREG_ATTRIBBUFFERB_CONFIG2 0x0226
#define GPUREG_INDEXBUFFER_CONFIG 0x0227 #define GPUREG_INDEXBUFFER_CONFIG 0x0227
#define GPUREG_NUMVERTICES 0x0228 #define GPUREG_NUMVERTICES 0x0228
#define GPUREG_GEOSTAGE_CONFIG 0x0229 #define GPUREG_GEOSTAGE_CONFIG 0x0229
#define GPUREG_DRAW_VERTEX_OFFSET 0x022A #define GPUREG_VERTEX_OFFSET 0x022A
#define GPUREG_022B 0x022B #define GPUREG_022B 0x022B
#define GPUREG_022C 0x022C #define GPUREG_022C 0x022C
#define GPUREG_022D 0x022D #define GPUREG_022D 0x022D
@ -562,18 +591,18 @@
#define GPUREG_DRAWELEMENTS 0x022F #define GPUREG_DRAWELEMENTS 0x022F
#define GPUREG_0230 0x0230 #define GPUREG_0230 0x0230
#define GPUREG_0231 0x0231 #define GPUREG_0231 0x0231
#define GPUREG_0232 0x0232 #define GPUREG_FIXEDATTRIB_INDEX 0x0232
#define GPUREG_0233 0x0233 #define GPUREG_FIXEDATTRIB_DATA0 0x0233
#define GPUREG_0234 0x0234 #define GPUREG_FIXEDATTRIB_DATA1 0x0234
#define GPUREG_0235 0x0235 #define GPUREG_FIXEDATTRIB_DATA2 0x0235
#define GPUREG_0236 0x0236 #define GPUREG_0236 0x0236
#define GPUREG_0237 0x0237 #define GPUREG_0237 0x0237
#define GPUREG_0238 0x0238 #define GPUREG_CMDBUF_SIZE0 0x0238
#define GPUREG_0239 0x0239 #define GPUREG_CMDBUF_SIZE1 0x0239
#define GPUREG_023A 0x023A #define GPUREG_CMDBUF_ADDR0 0x023A
#define GPUREG_023B 0x023B #define GPUREG_CMDBUF_ADDR1 0x023B
#define GPUREG_023C 0x023C #define GPUREG_CMDBUF_JUMP0 0x023C
#define GPUREG_023D 0x023D #define GPUREG_CMDBUF_JUMP1 0x023D
#define GPUREG_023E 0x023E #define GPUREG_023E 0x023E
#define GPUREG_023F 0x023F #define GPUREG_023F 0x023F
#define GPUREG_0240 0x0240 #define GPUREG_0240 0x0240
@ -607,7 +636,7 @@
#define GPUREG_025C 0x025C #define GPUREG_025C 0x025C
#define GPUREG_025D 0x025D #define GPUREG_025D 0x025D
#define GPUREG_PRIMITIVE_CONFIG 0x025E #define GPUREG_PRIMITIVE_CONFIG 0x025E
#define GPUREG_025F 0x025F #define GPUREG_RESTART_PRIMITIVE 0x025F
#define GPUREG_0260 0x0260 #define GPUREG_0260 0x0260
#define GPUREG_0261 0x0261 #define GPUREG_0261 0x0261
#define GPUREG_0262 0x0262 #define GPUREG_0262 0x0262
@ -640,6 +669,12 @@
#define GPUREG_027D 0x027D #define GPUREG_027D 0x027D
#define GPUREG_027E 0x027E #define GPUREG_027E 0x027E
#define GPUREG_027F 0x027F #define GPUREG_027F 0x027F
//-----------------------------------------------------------------------------
// Shader registers (0x280-0x2DF)
//-----------------------------------------------------------------------------
// Geometry shader
#define GPUREG_GSH_BOOLUNIFORM 0x0280 #define GPUREG_GSH_BOOLUNIFORM 0x0280
#define GPUREG_GSH_INTUNIFORM_I0 0x0281 #define GPUREG_GSH_INTUNIFORM_I0 0x0281
#define GPUREG_GSH_INTUNIFORM_I1 0x0282 #define GPUREG_GSH_INTUNIFORM_I1 0x0282
@ -667,6 +702,8 @@
#define GPUREG_GSH_OPDESCS_DATA 0x02A6 #define GPUREG_GSH_OPDESCS_DATA 0x02A6
#define GPUREG_02AE 0x02AE #define GPUREG_02AE 0x02AE
#define GPUREG_02AF 0x02AF #define GPUREG_02AF 0x02AF
// Vertex shader
#define GPUREG_VSH_BOOLUNIFORM 0x02B0 #define GPUREG_VSH_BOOLUNIFORM 0x02B0
#define GPUREG_VSH_INTUNIFORM_I0 0x02B1 #define GPUREG_VSH_INTUNIFORM_I0 0x02B1
#define GPUREG_VSH_INTUNIFORM_I1 0x02B2 #define GPUREG_VSH_INTUNIFORM_I1 0x02B2
@ -694,6 +731,11 @@
#define GPUREG_VSH_OPDESCS_DATA 0x02D6 #define GPUREG_VSH_OPDESCS_DATA 0x02D6
#define GPUREG_02DE 0x02DE #define GPUREG_02DE 0x02DE
#define GPUREG_02DF 0x02DF #define GPUREG_02DF 0x02DF
//-----------------------------------------------------------------------------
// Unknown registers (0x2E0-0x2FF)
//-----------------------------------------------------------------------------
#define GPUREG_02E0 0x02E0 #define GPUREG_02E0 0x02E0
#define GPUREG_02E1 0x02E1 #define GPUREG_02E1 0x02E1
#define GPUREG_02E2 0x02E2 #define GPUREG_02E2 0x02E2

44
libctru/source/gpu/gpu-old.c
View File

@ -42,8 +42,8 @@ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u3
float fw=(float)w; float fw=(float)w;
float fh=(float)h; float fh=(float)h;
GPUCMD_AddWrite(GPUREG_0111, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_INVALIDATE, 0x00000001);
u32 f116e=0x01000000|(((h-1)&0xFFF)<<12)|(w&0xFFF); u32 f116e=0x01000000|(((h-1)&0xFFF)<<12)|(w&0xFFF);
@ -52,18 +52,18 @@ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u3
param[0x2]=f116e; param[0x2]=f116e;
GPUCMD_AddIncrementalWrites(GPUREG_DEPTHBUFFER_LOC, param, 0x00000003); GPUCMD_AddIncrementalWrites(GPUREG_DEPTHBUFFER_LOC, param, 0x00000003);
GPUCMD_AddWrite(GPUREG_006E, f116e); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_DIM2, f116e);
GPUCMD_AddWrite(GPUREG_DEPTHBUFFER_FORMAT, 0x00000003); //depth buffer format GPUCMD_AddWrite(GPUREG_DEPTHBUFFER_FORMAT, 0x00000003); //depth buffer format
GPUCMD_AddWrite(GPUREG_COLORBUFFER_FORMAT, 0x00000002); //color buffer format GPUCMD_AddWrite(GPUREG_COLORBUFFER_FORMAT, 0x00000002); //color buffer format
GPUCMD_AddWrite(GPUREG_011B, 0x00000000); //? GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_BLOCK32, 0x00000000); //?
param[0x0]=f32tof24(fw/2); param[0x0]=f32tof24(fw/2);
param[0x1]=f32tof31(2.0f / fw) << 1; param[0x1]=f32tof31(2.0f / fw) << 1;
param[0x2]=f32tof24(fh/2); param[0x2]=f32tof24(fh/2);
param[0x3]=f32tof31(2.0f / fh) << 1; param[0x3]=f32tof31(2.0f / fh) << 1;
GPUCMD_AddIncrementalWrites(GPUREG_0041, param, 0x00000004); GPUCMD_AddIncrementalWrites(GPUREG_VIEWPORT_WIDTH, param, 0x00000004);
GPUCMD_AddWrite(GPUREG_0068, (y<<16)|(x&0xFFFF)); GPUCMD_AddWrite(GPUREG_VIEWPORT_XY, (y<<16)|(x&0xFFFF));
param[0x0]=0x00000000; param[0x0]=0x00000000;
param[0x1]=0x00000000; param[0x1]=0x00000000;
@ -75,7 +75,7 @@ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u3
param[0x1]=0x0000000F; param[0x1]=0x0000000F;
param[0x2]=0x00000002; param[0x2]=0x00000002;
param[0x3]=0x00000002; param[0x3]=0x00000002;
GPUCMD_AddIncrementalWrites(GPUREG_0112, param, 0x00000004); GPUCMD_AddIncrementalWrites(GPUREG_COLORBUFFER_READ, param, 0x00000004);
} }
void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h) void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h)
@ -102,12 +102,12 @@ void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref)
void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask) void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask)
{ {
GPUCMD_AddWrite(GPUREG_STENCILTEST_CONFIG, (enable&1)|((function&7)<<4)|(write_mask<<8)|(ref<<16)|(input_mask<<24)); GPUCMD_AddWrite(GPUREG_STENCIL_TEST, (enable&1)|((function&7)<<4)|(write_mask<<8)|(ref<<16)|(input_mask<<24));
} }
void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass) void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass)
{ {
GPUCMD_AddWrite(GPUREG_STENCILOP_CONFIG, sfail | (dfail << 4) | (pass << 8)); GPUCMD_AddWrite(GPUREG_STENCIL_ACTION, sfail | (dfail << 4) | (pass << 8));
} }
void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask) void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask)
@ -120,13 +120,13 @@ void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alp
GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst) GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst)
{ {
GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, colorEquation | (alphaEquation<<8) | (colorSrc<<16) | (colorDst<<20) | (alphaSrc<<24) | (alphaDst<<28)); GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, colorEquation | (alphaEquation<<8) | (colorSrc<<16) | (colorDst<<20) | (alphaSrc<<24) | (alphaDst<<28));
GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000100); GPUCMD_AddMaskedWrite(GPUREG_BLEND_ENABLE, 0x2, 0x00000100);
} }
void GPU_SetColorLogicOp(GPU_LOGICOP op) void GPU_SetColorLogicOp(GPU_LOGICOP op)
{ {
GPUCMD_AddWrite(GPUREG_COLORLOGICOP_CONFIG, op); GPUCMD_AddWrite(GPUREG_LOGICOP_CONFIG, op);
GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000000); GPUCMD_AddMaskedWrite(GPUREG_BLEND_ENABLE, 0x2, 0x00000000);
} }
void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a) void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a)
@ -137,7 +137,7 @@ void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a)
void GPU_SetTextureEnable(GPU_TEXUNIT units) void GPU_SetTextureEnable(GPU_TEXUNIT units)
{ {
GPUCMD_AddMaskedWrite(GPUREG_006F, 0x2, units<<8); // enables texcoord outputs GPUCMD_AddMaskedWrite(GPUREG_006F, 0x2, units<<8); // enables texcoord outputs
GPUCMD_AddWrite(GPUREG_TEXUNITS_CONFIG, 0x00011000|units); // enables texture units GPUCMD_AddWrite(GPUREG_TEXUNIT_ENABLE, 0x00011000|units); // enables texture units
} }
void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType) void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType)
@ -235,7 +235,7 @@ void GPU_SetFaceCulling(GPU_CULLMODE mode)
void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config) void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config)
{ {
GPUCMD_AddMaskedWrite(GPUREG_TEXENV_BUFFER_CONFIG, 0x2, (rgb_config << 8) | (alpha_config << 12)); GPUCMD_AddMaskedWrite(GPUREG_TEXENV_UPDATE_BUFFER, 0x2, (rgb_config << 8) | (alpha_config << 12));
} }
const u8 GPU_TEVID[]={0xC0,0xC8,0xD0,0xD8,0xF0,0xF8}; const u8 GPU_TEVID[]={0xC0,0xC8,0xD0,0xD8,0xF0,0xF8};
@ -259,13 +259,13 @@ void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count)
{ {
//set primitive type //set primitive type
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive); GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001); GPUCMD_AddMaskedWrite(GPUREG_RESTART_PRIMITIVE, 0x2, 0x00000001);
//index buffer address register should be cleared (except bit 31) before drawing //index buffer address register should be cleared (except bit 31) before drawing
GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000); GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000);
//pass number of vertices //pass number of vertices
GPUCMD_AddWrite(GPUREG_NUMVERTICES, count); GPUCMD_AddWrite(GPUREG_NUMVERTICES, count);
//set first vertex //set first vertex
GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, first); GPUCMD_AddWrite(GPUREG_VERTEX_OFFSET, first);
//all the following except 0x000F022E might be useless //all the following except 0x000F022E might be useless
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000001); GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000001);
@ -273,20 +273,20 @@ void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count)
GPUCMD_AddWrite(GPUREG_DRAWARRAYS, 0x00000001); GPUCMD_AddWrite(GPUREG_DRAWARRAYS, 0x00000001);
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001); GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddWrite(GPUREG_0231, 0x00000001); GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
GPUCMD_AddWrite(GPUREG_0111, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
} }
void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n) void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n)
{ {
//set primitive type //set primitive type
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive); GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001); GPUCMD_AddMaskedWrite(GPUREG_RESTART_PRIMITIVE, 0x2, 0x00000001);
//index buffer (TODO : support multiple types) //index buffer (TODO : support multiple types)
GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000|((u32)indexArray)); GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000|((u32)indexArray));
//pass number of vertices //pass number of vertices
GPUCMD_AddWrite(GPUREG_NUMVERTICES, n); GPUCMD_AddWrite(GPUREG_NUMVERTICES, n);
GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, 0x00000000); GPUCMD_AddWrite(GPUREG_VERTEX_OFFSET, 0x00000000);
GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0x2, 0x00000100); GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0x2, 0x00000100);
GPUCMD_AddMaskedWrite(GPUREG_0253, 0x2, 0x00000100); GPUCMD_AddMaskedWrite(GPUREG_0253, 0x2, 0x00000100);
@ -296,12 +296,12 @@ void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n)
GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001); GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
GPUCMD_AddWrite(GPUREG_0231, 0x00000001); GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
// CHECKME: does this one also require command 0x0111 at the end? // CHECKME: does this one also require GPUREG_FRAMEBUFFER_FLUSH at the end?
} }
void GPU_FinishDrawing() void GPU_FinishDrawing()
{ {
GPUCMD_AddWrite(GPUREG_0111, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_INVALIDATE, 0x00000001);
GPUCMD_AddWrite(GPUREG_0063, 0x00000001); GPUCMD_AddWrite(GPUREG_0063, 0x00000001);
} }

4
libctru/source/gpu/gpu.c
View File

@ -83,8 +83,8 @@ void GPUCMD_Add(u32 header, u32* param, u32 paramlength)
void GPUCMD_Finalize(void) void GPUCMD_Finalize(void)
{ {
GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x8, 0x00000000); GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x8, 0x00000000);
GPUCMD_AddWrite(GPUREG_0111, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
GPUCMD_AddWrite(GPUREG_0110, 0x00000001); GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_INVALIDATE, 0x00000001);
GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678); GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678);
GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678); //not the cleanest way of guaranteeing 0x10-byte size but whatever good enough for now GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678); //not the cleanest way of guaranteeing 0x10-byte size but whatever good enough for now
} }