On some platforms, SDL_MemoryBarrierRelease() is defined to
SDL_CompilerBarrier(). If SDL_CompilerBarrier() is also defined to
the fallback spinlock acquire/release, then we will infinitely
recurse in SDL_UnlockSpinlock(). Avoid this by not unlocking the
temporary spinlock we create.
(cherry picked from commit 66e98b5598)
This is a little more efficient than a DMB ISH and matches what
GCC, Clang, and MSVC generate for a C++11 acquire fence.
(cherry picked from commit f2206974b0)
This avoids requiring inline assembly for each architecture.
It also fixes some weakly ordered architectures which lacked
said inline assembly (RISC-V, MIPS, LoongArch, etc) and were
thus disasterously broken.
(cherry picked from commit 2858a32723)
Everything in SDL3 up to the ABI lock is reported as available since 3.1.3.
Everything else will be reported as since 3.2.0 (what will be the first
official release).
Also ran a Perl script over the headers to change everything to 3.1.3 that
wasn't an API function, since fnsince.pl can't manage those. If there's a
macro or datatype that has snuck in that needs to be 3.2.0 instead, we'll
have to manually fix it up, but it shouldn't be a big deal in any case.
Reference PR #11304.
We require stdbool.h in the build environment, so we might as well use the plain bool type.
If your environment doesn't have stdbool.h, this simple replacement will suffice:
typedef signed char bool;
Implemented using these sed commands on the headers:
sed -E -i'' '/SDLCALL|;/ s,([a-z])\* ,\1 *,g' *
sed -E -i'' 's,(\(.*[^\*])\* ([a-z])(.*\)),\1*\2\3,g' *
sed -E -i'' 's,\*const,* const,g' *
sed -E -i'' 's,\*SDLCALL,* SDLCALL,g' *
sed -E -i'' 's,void\(,void (,g' *
git checkout *gl*
The ARM926EJ-S Technical Reference Manual states:
> You can only access CP15 registers with MRC and MCR instructions in a
> privileged mode. CDP, LDC, STC, MCRR, and MRRC instructions, and unprivileged
> MRC or MCR instructions to CP15 cause the Undefined instruction exception to
> be taken.
Furthermore, `MCR p15, 0, <Rd>, c7, c10, 5` (later called Data Memory Barrier)
is not specified for the ARM926. Thus, SDL should not use these cache
instructions on ARMv5.
