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aarch64: Adjust PR117048 scan assembly test

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This test needed adjustment for the changes from PR123584.
Pushing to trunk.

Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>

gcc/testsuite/

	PR target/117048
	PR target/123584
	* gcc.target/aarch64/simd/pr117048.c: Scan for # in assembly immediate.
This commit is contained in:
Kyrylo Tkachov
2026-02-05 06:48:34 -08:00
parent 7722c043f0
commit 216bda1130
1 changed files with 6 additions and 6 deletions
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12
gcc/testsuite/gcc.target/aarch64/simd/pr117048.c
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@@ -8,7 +8,7 @@
/*
** func_shl_eor:
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, #63
** ret
*/
uint64x2_t
@@ -19,7 +19,7 @@ func_shl_eor (uint64x2_t a, uint64x2_t b) {
/*
** func_add_eor:
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, #63
** ret
*/
uint64x2_t
@@ -30,7 +30,7 @@ func_add_eor (uint64x2_t a, uint64x2_t b) {
/*
** func_shl_orr:
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, #63
** ret
*/
uint64x2_t
@@ -41,7 +41,7 @@ func_shl_orr (uint64x2_t a, uint64x2_t b) {
/*
** func_add_orr:
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, #63
** ret
*/
uint64x2_t
@@ -52,7 +52,7 @@ func_add_orr (uint64x2_t a, uint64x2_t b) {
/*
** func_shl_add:
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, #63
** ret
*/
uint64x2_t
@@ -63,7 +63,7 @@ func_shl_add (uint64x2_t a, uint64x2_t b) {
/*
** func_add_add:
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, #63
** ret
*/
uint64x2_t