TeamHeptaMirrors/gcc
1
0
Fork 1
mirror of https://github.com/gcc-mirror/gcc.git synced 2026-05-06 23:25:24 +02:00
Code Issues Packages Projects Releases Wiki Activity

sparc.md (shift insns): Do not mask off second operand...

Browse Source 
2002-05-06  David S. Miller  <davem@redhat.com>

	* config/sparc/sparc.md (shift insns): Do not mask off
	second operand, 'I' constraint and SHIFT_COUNT_TRUNCATED
	take care of it.

From-SVN: r53238
This commit is contained in:
David S. Miller
2002-05-06 14:31:56 -07:00
parent 97320a3f23
commit 8d8563aeba
1 changed files with 0 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
gcc/config/sparc/sparc.md
View File

@@ -7241,10 +7241,6 @@
""
"*
{
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) > 31)
operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
if (operands[2] == const1_rtx)
return \"add\\t%1, %1, %0\";
return \"sll\\t%1, %2, %0\";
@@ -7276,10 +7272,6 @@
"TARGET_ARCH64"
"*
{
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) > 63)
operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
if (operands[2] == const1_rtx)
return \"add\\t%1, %1, %0\";
return \"sllx\\t%1, %2, %0\";
@@ -7344,10 +7336,6 @@
""
"*
{
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) > 31)
operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
return \"sra\\t%1, %2, %0\";
}"
[(set_attr "type" "shift")])
@@ -7405,10 +7393,6 @@
"TARGET_ARCH64"
"*
{
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) > 63)
operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
return \"srax\\t%1, %2, %0\";
}"
[(set_attr "type" "shift")])
@@ -7431,10 +7415,6 @@
""
"*
{
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) > 31)
operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
return \"srl\\t%1, %2, %0\";
}"
[(set_attr "type" "shift")])
@@ -7502,10 +7482,6 @@
"TARGET_ARCH64"
"*
{
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) > 63)
operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
return \"srlx\\t%1, %2, %0\";
}"
[(set_attr "type" "shift")])