x86: Update *one_cmplqi_ext<mode>_1

After

commit 965564eafb
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Tue Jul 29 15:58:34 2025 +0100

    simplify-rtx: Simplify subregs of logic ops

combine generates

(set (zero_extract:SI (reg/v:SI 101 [ a ])
        (const_int 8 [0x8])
        (const_int 8 [0x8]))
    (not:SI (sign_extract:SI (reg:SI 107 [ b ])
            (const_int 8 [0x8])
            (const_int 8 [0x8]))))

instead of

(set (zero_extract:SI (reg/v:SI 101 [ a ])
        (const_int 8 [0x8])
        (const_int 8 [0x8]))
    (subreg:SI (not:QI (subreg:QI (sign_extract:SI (reg:SI 107 [ b ])
                    (const_int 8 [0x8])
                    (const_int 8 [0x8])) 0)) 0))

Update *one_cmplqi_ext<mode>_1 to support the new pattern.

	PR target/121306
	* config/i386/i386.md (*one_cmplqi_ext<mode>_1): Updated to
	support the new pattern.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
This commit is contained in:
H.J. Lu
2025-08-01 08:34:49 -07:00
parent 32b1be7eb4
commit a58d770fa1

View File

@@ -15351,13 +15351,11 @@
(match_operand 0 "int248_register_operand" "+Q,&Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(not:QI
(subreg:QI
(match_operator:SWI248 2 "extract_operator"
[(match_operand 1 "int248_register_operand" "0,!Q")
(const_int 8)
(const_int 8)]) 0)) 0))]
(not:SWI248
(match_operator:SWI248 2 "extract_operator"
[(match_operand 1 "int248_register_operand" "0,!Q")
(const_int 8)
(const_int 8)])))]
""
"@
not{b}\t%h0
@@ -15370,11 +15368,8 @@
(match_dup 1) (const_int 8) (const_int 8)))
(set (zero_extract:SWI248
(match_dup 0) (const_int 8) (const_int 8))
(subreg:SWI248
(not:QI
(subreg:QI
(match_op_dup 2
[(match_dup 0) (const_int 8) (const_int 8)]) 0)) 0))]
(not:SWI248
(match_op_dup 2 [(match_dup 0) (const_int 8) (const_int 8)])))]
""
[(set_attr "type" "negnot")
(set_attr "mode" "QI")])