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@@ -1,3 +1,175 @@
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2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
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* common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
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* common/config/i386/i386-common.cc: Add yongfeng.
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* common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
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Add ZHAOXIN_FAM7H_YONGFENG.
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* config.gcc: Add yongfeng.
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* config/i386/driver-i386.cc (host_detect_local_cpu):
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Let -march=native recognize yongfeng processors.
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* config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
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* config/i386/i386-options.cc (m_YONGFENG): New definition.
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(m_ZHAOXIN): Ditto.
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* config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
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* config/i386/i386.md: Add yongfeng.
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* config/i386/lujiazui.md: Fix typo.
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* config/i386/x86-tune-costs.h (struct processor_costs):
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Add yongfeng costs.
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* config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
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(ix86_adjust_cost): Ditto.
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* config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
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m_LUJIAZUI with m_ZHAOXIN.
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(X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
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(X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
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(X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
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(X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
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(X86_TUNE_MOVX): Ditto.
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(X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
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(X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
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(X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
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(X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
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(X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
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(X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
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(X86_TUNE_USE_LEAVE): Ditto.
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(X86_TUNE_PUSH_MEMORY): Ditto.
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(X86_TUNE_LCP_STALL): Ditto.
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(X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
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(X86_TUNE_OPT_AGU): Ditto.
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(X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
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(X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
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(X86_TUNE_USE_SAHF): Ditto.
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(X86_TUNE_USE_BT): Ditto.
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(X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
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(X86_TUNE_ONE_IF_CONV_INSN): Ditto.
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(X86_TUNE_AVOID_MFENCE): Ditto.
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(X86_TUNE_EXPAND_ABS): Ditto.
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(X86_TUNE_USE_SIMODE_FIOP): Ditto.
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(X86_TUNE_USE_FFREEP): Ditto.
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(X86_TUNE_EXT_80387_CONSTANTS): Ditto.
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(X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
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(X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
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(X86_TUNE_SSE_TYPELESS_STORES): Ditto.
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(X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
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(X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
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(X86_TUNE_USE_GATHER_4PARTS): Ditto.
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(X86_TUNE_USE_GATHER_8PARTS): Ditto.
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(X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
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* doc/extend.texi: Add details about yongfeng.
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* doc/invoke.texi: Ditto.
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* config/i386/yongfeng.md: New file to describe yongfeng processor.
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2023-10-30 Martin Jambor <mjambor@suse.cz>
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PR ipa/111157
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* ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
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* ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
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(update_signature): Mark any any IPA-CP aggregate constants at
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positions known to be killed as killed. Move check that there is
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clone_info after this pruning.
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* ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
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(ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
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(push_agg_values_from_plats): Likewise.
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(ipa_push_agg_values_from_jfunc): Likewise.
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(estimate_local_effects): Likewise.
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(push_agg_values_for_index_from_edge): Likewise.
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* ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
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flag.
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(read_ipcp_transformation_info): Likewise.
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(ipcp_get_aggregate_const): Update comment, assert that encountered
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record does not have killed flag set.
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(ipcp_transform_function): Prune all aggregate constants with killed
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set.
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2023-10-30 Martin Jambor <mjambor@suse.cz>
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PR ipa/111157
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* ipa-prop.h (ipcp_transformation): New member function template
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remove_argaggs_if.
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* ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
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filter aggreagate constants.
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2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
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PR middle-end/101955
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* config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
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to convert sign extract of the least significant bit into an
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AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
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2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
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* config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
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Provide reasonable values for SHIFTS and ROTATES by constant
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bit counts depending upon TARGET_BARREL_SHIFTER.
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(arc_insn_cost): Use insn attributes if the instruction is
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recognized. Avoid calling get_attr_length for type "multi",
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i.e. define_insn_and_split patterns without explicit type.
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Fall-back to set_rtx_cost for single_set and pattern_cost
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otherwise.
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* config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
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(BRANCH_COST): Improve/correct definition.
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(LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
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2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
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* config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
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(arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
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(arc_split_lshr): Use lsr16 on TARGET_SWAP.
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(arc_split_rotl): Use swap on TARGET_SWAP.
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(arc_split_rotr): Likewise.
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* config/arc/arc.md (ANY_ROTATE): New code iterator.
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(<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
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swap instruction on TARGET_SWAP.
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(ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
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(lshrsi2_cnt16): New define_insn for LSR16 instruction.
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(*ashlsi2_cnt16): See above.
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2023-10-30 Richard Ball <richard.ball@arm.com>
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* config/arm/aout.h: Change to use the Lrtx label.
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* config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
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from (!target_pure_code) condition.
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(ADDR_VEC_ALIGN): Add align for tables in rodata section.
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* config/arm/arm.cc (arm_output_casesi): Alter the function to include
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.Lrtx label and remove adr instructions.
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* config/arm/arm.md
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(arm_casesi_internal): Use force_reg to generate ldr instructions that
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would otherwise be out of range, and change rtl to accommodate force reg.
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Additionally remove unnecessary register temp.
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(casesi): Remove pure code check for Arm.
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* config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
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targets from JUMP_TABLES_IN_TEXT_SECTION definition.
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2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
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PR target/106907
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* config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
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xor to an equality and fix comment indentation.
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2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
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* config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
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* config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
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* config/riscv/vector.md: Ditto.
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2023-10-30 liuhongt <hongtao.liu@intel.com>
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PR target/104610
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* config/i386/i386-expand.cc (ix86_expand_branch): Handle
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512-bit vector with vpcmpeq + kortest.
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* config/i386/i386.md (cbranchxi4): New expander.
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* config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
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and V8DImode.
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2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
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PR target/111449
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* expr.cc (qi_vector_mode_supported_p): Rename to...
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(by_pieces_mode_supported_p): ...this, and extends it to do
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the checking for both scalar and vector mode.
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(widest_fixed_size_mode_for_size): Call
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by_pieces_mode_supported_p to examine the mode.
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(op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
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2023-10-29 Martin Uecker <uecker@tugraz.at>
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PR tree-optimization/109334
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GCC Administrator