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sh: Fix modes on if_then_else [PR123852]

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Inside the machine description of the sh target,
there are some modes missing on if_then_else rtl. This
causes an ICE during the vartrack pass where it is
creating a simplifying a subreg of that rtl.
This worked before r16-3067-g8e3239e3e92f3c where
simplify_gen_subreg would return NULL RTL on the
case where the mode was VOIDmode.
Anyways this is the obvious patch which adds the modes
on the if_then_else and now fixes the Ada and algol68
building (and some other code).

Tested by Doko on sh-linux-gnu and the Ada and algol68
langauges enabled.
Pushed as obvious.

	PR target/123852

gcc/ChangeLog:

	* config/sh/sh.md (movsicc_t_false): Add the SImode
	on the if_then_else.
	(movsicc_t_true): Likewise.
	(negsi_cond): Likewise.
	(negdi_cond): Add the DImode on the if_then_else.
	(bst_m2a): Add the QImode on the if_then_else.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
This commit is contained in:
Andrew Pinski
2026-03-21 15:15:07 -07:00
parent a60cf319b6
commit e0e1bcb3a1
1 changed files with 5 additions and 5 deletions
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10
gcc/config/sh/sh.md
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@@ -1466,7 +1466,7 @@
(define_insn "*movsicc_t_false"
[(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
(if_then_else (eq (reg:SI T_REG) (const_int 0))
(if_then_else:SI (eq (reg:SI T_REG) (const_int 0))
(match_operand:SI 1 "general_movsrc_operand" "r,I08")
(match_operand:SI 2 "arith_reg_operand" "0,0")))]
"TARGET_PRETEND_CMOVE
@@ -1483,7 +1483,7 @@
(define_insn "*movsicc_t_true"
[(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
(if_then_else (ne (reg:SI T_REG) (const_int 0))
(if_then_else:SI (ne (reg:SI T_REG) (const_int 0))
(match_operand:SI 1 "general_movsrc_operand" "r,I08")
(match_operand:SI 2 "arith_reg_operand" "0,0")))]
"TARGET_PRETEND_CMOVE
@@ -4527,7 +4527,7 @@
;; instruction on SH4 202.
(define_insn_and_split "negsi_cond"
[(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
(if_then_else
(if_then_else:SI
(eq:SI (reg:SI T_REG) (match_operand:SI 3 "const_int_operand" "M,N"))
(match_operand:SI 1 "arith_reg_operand" "0,0")
(neg:SI (match_operand:SI 2 "arith_reg_operand" "r,r"))))]
@@ -4565,7 +4565,7 @@
(define_insn_and_split "negdi_cond"
[(set (match_operand:DI 0 "arith_reg_dest")
(if_then_else
(if_then_else:DI
(eq:SI (reg:SI T_REG) (match_operand:SI 3 "const_int_operand"))
(match_operand:DI 1 "arith_reg_operand")
(neg:DI (match_operand:DI 2 "arith_reg_operand"))))
@@ -10316,7 +10316,7 @@
;;; Transfer the contents of the T bit to a specified bit of memory.
(define_insn "bst_m2a"
[(set (match_operand:QI 0 "bitwise_memory_operand" "+Sbw,m")
(if_then_else (eq (reg:SI T_REG) (const_int 0))
(if_then_else:QI (eq (reg:SI T_REG) (const_int 0))
(and:QI
(not:QI (ashift:QI (const_int 1)
(match_operand:QI 1 "const_int_operand" "K03,K03")))