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ae4438537fbc2ed04f3b0fb32d4e02b0ed6977a1
197317 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Harald Anlauf
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ae4438537f |
Fortran: reject bad SIZE argument while simplifying ISHFTC [PR106911]
gcc/fortran/ChangeLog: PR fortran/106911 * simplify.cc (gfc_simplify_ishftc): If the SIZE argument is known to be outside the allowed range, terminate simplification. gcc/testsuite/ChangeLog: PR fortran/106911 * gfortran.dg/pr106911.f90: New test. |
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Jakub Jelinek
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7676235f69 |
ivopts: Fix IP_END handling for asm goto [PR107997]
The following testcase ICEs, because the latch bb ends with asm goto which has both fallthrough to the header and one or more labels in the header too. In that case there is just a single edge out of the latch block, but still the asm goto is stmt_ends_bb_p statement, yet ivopts decides to emit an IV bump at the IP_END position and inserts it into the same bb as the asm goto after it, which then fails verification (control flow in the middle of bb). The following patch fixes it by splitting the latch -> header edge in that case and inserting into the newly created bb, where split_edge -> redirect_edge_and_branch is able to deal with this case correctly. 2022-12-10 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/107997 * tree-ssa-loop-ivopts.cc: Include cfganal.h. (create_new_iv) <case IP_END>: If ip_end_pos bb is non-empty and ends with a stmt which ends bb, instead of adding iv update after it split the latch edge and insert iterator into the new latch bb. * gcc.c-torture/compile/pr107997.c: New test. |
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Tobias Burnus
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ea4b23d9c8 |
libgomp: Handle OpenMP's reverse offloads
This commit enabled reverse offload for nvptx such that gomp_target_rev actually gets called. And it fills the latter function to do all of the following: finding the host function to the device func ptr and copying the arguments to the host, processing the mapping/firstprivate, calling the host function, copying back the data and freeing as needed. The data handling is made easier by assuming that all host variables either existed before (and are in the mapping) or that those are devices variables not yet available on the host. Thus, the reverse mapping can do without refcounts etc. Note that the spec disallows inside a target region device-affecting constructs other than target plus ancestor device-modifier and it also limits the clauses permitted on this construct. For the function addresses, an additional splay tree is used; for the lookup of mapped variables, the existing splay-tree is used. Unfortunately, its data structure requires a full walk of the tree; Additionally, the just mapped variables are recorded in a separate data structure an extra lookup. While the lookup is slow, assuming that only few variables get mapped in each reverse offload construct and that reverse offload is the exception and not performance critical, this seems to be acceptable. libgomp/ChangeLog: * libgomp.h (struct target_mem_desc): Predeclare; move below after 'reverse_splay_tree_node' and add rev_array member. (struct reverse_splay_tree_key_s, reverse_splay_compare): New. (reverse_splay_tree_node, reverse_splay_tree, reverse_splay_tree_key): New typedef. (struct gomp_device_descr): Add mem_map_rev member. * oacc-host.c (host_dispatch): NULL init .mem_map_rev. * plugin/plugin-nvptx.c (GOMP_OFFLOAD_get_num_devices): Claim support for GOMP_REQUIRES_REVERSE_OFFLOAD. * splay-tree.h (splay_tree_callback_stop): New typedef; like splay_tree_callback but returning int not void. (splay_tree_foreach_lazy): Define; like splay_tree_foreach but taking splay_tree_callback_stop as argument. * splay-tree.c (splay_tree_foreach_internal_lazy, splay_tree_foreach_lazy): New; but early exit if callback returns nonzero. * target.c: Instatiate splay_tree_c with splay_tree_prefix 'reverse'. (gomp_map_lookup_rev): New. (gomp_load_image_to_device): Handle reverse-offload function lookup table. (gomp_unload_image_from_device): Free devicep->mem_map_rev. (struct gomp_splay_tree_rev_lookup_data, gomp_splay_tree_rev_lookup, gomp_map_rev_lookup, struct cpy_data, gomp_map_cdata_lookup_int, gomp_map_cdata_lookup): New auxiliary structs and functions for gomp_target_rev. (gomp_target_rev): Implement reverse offloading and its mapping. (gomp_target_init): Init current_device.mem_map_rev.root. * testsuite/libgomp.fortran/reverse-offload-2.f90: New test. * testsuite/libgomp.fortran/reverse-offload-3.f90: New test. * testsuite/libgomp.fortran/reverse-offload-4.f90: New test. * testsuite/libgomp.fortran/reverse-offload-5.f90: New test. * testsuite/libgomp.fortran/reverse-offload-5a.f90: New test without mapping of on-device allocated variables. |
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Gaius Mulley
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68ee8a64ac |
Add initial ChangeLogs for modula2.
Add initial ChangeLog file in libgm2 and gcc/m2. ChangeLog: * libgm2: (New directory). * libgm2/ChangeLog: (New file). gcc/ChangeLog: * m2: (New directory). * m2/ChangeLog: (New file). Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com> |
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Thomas Schwinge
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24ff0b3e0c | Add stub 'gcc/rust/ChangeLog' | ||
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Tobias Burnus
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84f6f8a2a9 |
Fortran: Replace simple '.' quotes by %<.%>
When using %qs instead of '%s' or %<=%> instead of '=' looks nicer by having nicer quotes and bold text, if the terminal supports it; otherwise, plain quotes are used. gcc/fortran/ChangeLog: * match.cc (gfc_match_member_sep): Use %<...%> in gfc_error. * openmp.cc (gfc_match_oacc_routine, gfc_match_omp_context_selector, gfc_match_omp_context_selector_specification, gfc_match_omp_declare_variant, resolve_omp_clauses): Likewise; use %qs instead of '%s'. * primary.cc (match_real_constant, gfc_match_varspec): Likewise. * resolve.cc (gfc_resolve_formal_arglist, resolve_operator, resolve_ordinary_assign): Likewise. |
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Thomas Schwinge
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325529e21e |
Prepare 'contrib/gcc-changelog/git_commit.py' for GCC/Rust
contrib/ * gcc-changelog/git_commit.py (default_changelog_locations): Add 'gcc/rust'. (bug_components): Add 'rust'. |
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Gaius Mulley
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7e4aa71043 |
Add ChangeLog directories for modula2 into git_commit.py.
Prepare to add changelogs for the Modula2 front end by changing the contrib git_commit.py script. contrib/ChangeLog: * gcc-changelog/git_commit.py (default_changelog_locations): New entry for gcc/m2. New entry for libgm2. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com> |
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Ian Lance Taylor
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1bdba731b9 |
libbacktrace: rewrite and simplify main zstd loop
* elf.c (ZSTD_TABLE_*): Use elf_zstd_fse_baseline_entry. (ZSTD_ENCODE_BASELINE_BITS): Define. (ZSTD_DECODE_BASELINE, ZSTD_DECODE_BASEBITS): Define. (elf_zstd_literal_length_base): New static const array. (elf_zstd_match_length_base): Likewise. (struct elf_zstd_fse_baseline_entry): Define. (elf_zstd_make_literal_baseline_fse): New static function. (elf_zstd_make_offset_baseline_fse): Likewise. (elf_zstd_make_match_baseline_fse): Likewise. (print_table, main): Use elf_zstd_fse_baseline_entry. (elf_zstd_lit_table, elf_zstd_match_table): Likewise. (elf_zstd_offset_table): Likewise. (struct elf_zstd_seq_decode): Likewise. Remove use_rle and rle fields. (elf_zstd_unpack_seq_decode): Use elf_zstd_fse_baseline_entry, taking a conversion function. Convert RLE to FSE. (elf_zstd_literal_length_baseline): Remove. (elf_zstd_literal_length_bits): Remove. (elf_zstd_match_length_baseline): Remove. (elf_zstd_match_length_bits): Remove. (elf_zstd_decompress): Use elf_zstd_fse_baseline_entry. Rewrite and simplify main loop. |
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GCC Administrator
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40ce6485f3 | Daily bump. | ||
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Paul Thomas
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01254aa2eb |
Fortran: ICE on recursive derived types with allocatable components [PR107872]
gcc/fortran/ChangeLog: PR fortran/107872 * resolve.cc (derived_inaccessible): Skip over allocatable components to prevent an infinite loop. gcc/testsuite/ChangeLog: PR fortran/107872 * gfortran.dg/pr107872.f90: New test. |
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Tobias Burnus
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b2e1c49b4a |
Fortran/OpenMP: align/allocator modifiers to the allocate clause
gcc/fortran/ChangeLog: * dump-parse-tree.cc (show_omp_namelist): Improve OMP_LIST_ALLOCATE output. * gfortran.h (struct gfc_omp_namelist): Add 'align' to 'u'. (gfc_free_omp_namelist): Add bool arg. * match.cc (gfc_free_omp_namelist): Likewise; free 'u.align'. * openmp.cc (gfc_free_omp_clauses, gfc_match_omp_clause_reduction, gfc_match_omp_flush): Update call. (gfc_match_omp_clauses): Match 'align/allocate modifers in 'allocate' clause. (resolve_omp_clauses): Resolve align. * st.cc (gfc_free_statement): Update call * trans-openmp.cc (gfc_trans_omp_clauses): Handle 'align'. libgomp/ChangeLog: * libgomp.texi (5.1 Impl. Status): Split allocate clause/directive item about 'align'; mark clause as 'Y' and directive as 'N'. * testsuite/libgomp.fortran/allocate-2.f90: New test. * testsuite/libgomp.fortran/allocate-3.f90: New test. |
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Jiufu Guo
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71b31d1375 |
rs6000: Remove useless copy_rtx in rs6000_emit_set_{,long}_const
Function rs6000_emit_set_const/rs6000_emit_set_long_const are only invoked from
two "define_split"s where the target operand is limited to gpc_reg_operand or
int_reg_operand, then the operand must be REG_P.
And in rs6000_emit_set_const/rs6000_emit_set_long_const, to create temp rtx,
it is using code like "gen_reg_rtx({S|D}Imode)", it must also be REG_P.
So, copy_rtx is not needed for temp and dest.
This patch removes those "copy_rtx" for rs6000_emit_set_const and
rs6000_emit_set_long_const.
gcc/ChangeLog:
* config/rs6000/rs6000.cc (rs6000_emit_set_const): Remove copy_rtx.
(rs6000_emit_set_long_const): Likewise.
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Martin Liska
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96cb786b75 |
MAINTAINERS: fix spacing
ChangeLog: * MAINTAINERS: Fix spacing. |
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Martin Liska
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d71b20fc30 |
i386: fix assert (__builtin_cpu_supports ("x86-64") >= 0)
Similar story as PR103661, we again return a negative number for __builtin_cpu_supports: Documentation says: int __builtin_cpu_supports(const char *feature) This function returns a positive integer if the run-time CPU supports feature and returns 0 otherwise. while we return -2147483648. Moreover, I noticed "x86-64" is not a valid option for __builtin_cpu_is, but for __builtin_cpu_supports. PR target/107551 gcc/ChangeLog: * config/i386/i386-builtins.cc (fold_builtin_cpu): Use same path as for PR103661. * doc/extend.texi: Fix "x86-64" use. gcc/testsuite/ChangeLog: * gcc.target/i386/builtin_target.c: Add more checks. |
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Sebastian Huber
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3e4b8dc477 |
Rename SUBTARGET_CC1_SPEC to OS_CC1_SPEC
This change resolves a naming conflict introduced by the recently added SUBTARGET_CC1_SPEC to gcc.cc. Some targets (mips and loongarch) aready used a SUBTARGET_CC1_SPEC define. Rename the define used by gcc.cc to OS_CC1_SPEC. gcc/ChangeLog: * config/rtems.h (SUBTARGET_CC1_SPEC): Rename to... (OS_CC1_SPEC): ...this. * gcc.cc (SUBTARGET_CC1_SPEC): Rename to... (OS_CC1_SPEC): ...this. |
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David Malcolm
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63a42ffc08 |
analyzer: rename region-model-impl-calls.cc to kf.cc
gcc/ChangeLog: * Makefile.in (ANALYZER_OBJS): Update for renaming of analyzer/region-model-impl-calls.cc to analyzer/kf.cc. gcc/analyzer/ChangeLog: * analyzer.h (class known_function): Expand comment. * region-model-impl-calls.cc: Rename to... * kf.cc: ...this. * known-function-manager.h (class known_function_manager): Add leading comment. Signed-off-by: David Malcolm <dmalcolm@redhat.com> |
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David Malcolm
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7dc0ecafe6 |
analyzer: fix ICE on region creation during get_referenced_base_regions [PR108003]
gcc/analyzer/ChangeLog: PR analyzer/108003 * call-summary.cc (call_summary_replay::convert_region_from_summary_1): Convert heap_regs_in_use from auto_sbitmap to auto_bitmap. * region-model-manager.cc (region_model_manager::get_or_create_region_for_heap_alloc): Convert from sbitmap to bitmap. * region-model-manager.h: Likewise. * region-model.cc (region_model::get_or_create_region_for_heap_alloc): Convert from auto_sbitmap to auto_bitmap. (region_model::get_referenced_base_regions): Likewise. * region-model.h: Include "bitmap.h" rather than "sbitmap.h". (region_model::get_referenced_base_regions): Convert from auto_sbitmap to auto_bitmap. gcc/testsuite/ChangeLog: PR analyzer/108003 * g++.dg/analyzer/pr108003.C: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com> |
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David Malcolm
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cf80a23e19 |
analyzer: handle memmove like memcpy
gcc/analyzer/ChangeLog: * region-model-impl-calls.cc (class kf_memcpy): Rename to... (class kf_memcpy_memmove): ...this. (kf_memcpy::impl_call_pre): Rename to... (kf_memcpy_memmove::impl_call_pre): ...this, and check the src for poison. (register_known_functions): Update for above renaming, and register BUILT_IN_MEMMOVE and BUILT_IN_MEMMOVE_CHK. gcc/testsuite/ChangeLog: * gcc.dg/analyzer/memcpy-1.c (test_8a, test_8b): New tests. * gcc.dg/analyzer/memmove-1.c: New test, based on memcpy-1.c * gcc.dg/analyzer/out-of-bounds-1.c (test7): Update expected result for uninit srcBuf. * gcc.dg/analyzer/out-of-bounds-5.c (test8, test9): Add dg-warnings for memcpy from uninit src vla. * gcc.dg/analyzer/pr104308.c (test_memmove_within_uninit): Expect creation point note to be missing on riscv*-*-*. Signed-off-by: David Malcolm <dmalcolm@redhat.com> |
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liuhongt
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2996b5c053 |
Enable hwasan for x86-64.
libsanitizer * configure.tgt: Enable hwasan for x86-64. |
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liuhongt
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bb57601772 |
Implement hwasan target_hook.
gcc/ChangeLog:
* doc/invoke.texi (x86 options): Document
-mlam={none,u48,u57}.
* config/i386/i386-opts.h (enum lam_type): New enum.
* config/i386/i386.cc (ix86_memtag_can_tag_addresses): New.
(ix86_memtag_set_tag): Ditto.
(ix86_memtag_extract_tag): Ditto.
(ix86_memtag_add_tag): Ditto.
(ix86_memtag_tag_size): Ditto.
(ix86_memtag_untagged_pointer): Ditto.
(TARGET_MEMTAG_CAN_TAG_ADDRESSES): New.
(TARGET_MEMTAG_ADD_TAG): Ditto.
(TARGET_MEMTAG_SET_TAG): Ditto.
(TARGET_MEMTAG_EXTRACT_TAG): Ditto.
(TARGET_MEMTAG_UNTAGGED_POINTER): Ditto.
(TARGET_MEMTAG_TAG_SIZE): Ditto.
(IX86_HWASAN_SHIFT): Ditto.
(IX86_HWASAN_TAG_SIZE): Ditto.
* config/i386/i386-expand.cc (ix86_expand_call): Untag code
pointer.
* config/i386/i386-options.cc (ix86_option_override_internal):
Error when enable -mlam=[u48|u57] for 32-bit code.
* config/i386/i386.opt: Add -mlam=[none|u48|u57].
* config/i386/i386-protos.h (ix86_memtag_untagged_pointer):
Declare.
(ix86_memtag_can_tag_addresses): Ditto.
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Jonathan Wakely
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d61c0357eb |
libstdc++: Remove digit separators [PR108015]
These are not valid in C++11 and cause a warning when preprocessing, even though they're inside a skipped group. chrono:2436: warning: missing terminating ' character libstdc++-v3/ChangeLog: PR libstdc++/108015 * include/std/chrono (hh_mm_ss): Remove digit separators. |
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Jonathan Wakely
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f76d7943bb |
libstdc++: Fix some -Wunused warnings in tests
libstdc++-v3/ChangeLog: * include/ext/pb_ds/detail/type_utils.hpp (PB_DS_STATIC_ASSERT): Add unused attribute to avoid -Wunused-local-typedef warnings. * testsuite/17_intro/tag_type_explicit_ctor.cc: Add pragma to ignore -Wunused-variable warnings |
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Jonathan Wakely
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646e979c43 |
libstdc++: Add [[nodiscard]] to chrono conversion functions
Also add doxygen comments. libstdc++-v3/ChangeLog: * include/bits/chrono.h (duration_cast, floor, round, abs, ceil) (time_point_cast): Add [[nodiscard]] attribute and doxygen comments. (treat_as_floating_point): Add doxygen commen. |
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Jonathan Wakely
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7eec3114eb |
libstdc++: Change class-key for duration and time_point to class
We define these with the 'struct' keyword, but the standard uses 'class'. This results in warnings if users try to refer to them using elaborated type specifiers. libstdc++-v3/ChangeLog: * include/bits/chrono.h (duration, time_point): Change 'struct' to 'class'. |
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GCC Administrator
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e6110da479 | Daily bump. | ||
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Marek Polacek
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6a07798c6b |
docs: Suggest options to improve ASAN stack traces
I got a complaint that while Clang docs suggest options that improve the quality of the backtraces ASAN prints (cf. <https://clang.llvm.org/docs/AddressSanitizer.html#usage>), our docs don't say anything to that effect. This patch amends that with a new paragraph. (It deliberately doesn't mention -fno-omit-frame-pointer.) gcc/ChangeLog: * doc/invoke.texi (-fsanitize=address): Suggest options to improve stack traces. |
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Harald Anlauf
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3a9f6d5a8e |
Fortran: diagnose and reject duplicate CONTIGUOUS attribute [PR108025]
gcc/fortran/ChangeLog: PR fortran/108025 * symbol.cc (gfc_add_contiguous): Diagnose and reject duplicate CONTIGUOUS attribute. gcc/testsuite/ChangeLog: PR fortran/108025 * gfortran.dg/contiguous_12.f90: New test. |
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Eugene Rozenfeld
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7410032a77 |
Fix count comparison in ipa-cp
The existing comparison was incorrect for non-PRECISE counts (e.g., AFDO): we could end up with a 0 base_count, which could lead to asserts, e.g., in good_cloning_opportunity_p. Tested on x86_64-pc-linux-gnu. gcc/ChangeLog: PR ipa/108000 * ipa-cp.cc (ipcp_propagate_stage): Fix profile count comparison gcc/testsuite * gcc.dg/tree-prof/pr108000.c: Regression test |
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David Faust
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5ddfe79440 |
bpf: add define_insn for bswap
The eBPF architecture provides 'end[be,le]' instructions for endianness swapping. Add a define_insn for bswap<mode>2 to use them instaed of falling back on a libcall. gcc/ * config/bpf/bpf.md (bswap<mode>2): New define_insn. gcc/testsuite/ * gcc.target/bpf/bswap-1.c: New test. |
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Jason Merrill
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bd0485f20f |
c++: build initializer_list<string> in a loop [PR105838]
The previous patch avoided building an initializer_list<string> at all when building a vector<string>, but in situations where that isn't possible, we could still build the initializer_list with a loop over a constant array. This is represented using a VEC_INIT_EXPR, which required adjusting a couple of places that expected the initializer array to have the same type as the target array and fixing build_vec_init not to undo our efforts. PR c++/105838 gcc/cp/ChangeLog: * call.cc (convert_like_internal) [ck_list]: Use maybe_init_list_as_array. * constexpr.cc (cxx_eval_vec_init_1): Init might have a different type. * tree.cc (build_vec_init_elt): Likewise. * init.cc (build_vec_init): Handle from_array from a TARGET_EXPR. Retain TARGET_EXPR of a different type. gcc/testsuite/ChangeLog: * g++.dg/tree-ssa/initlist-opt2.C: New test. |
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Jason Merrill
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d081807d8d |
c++: avoid initializer_list<string> [PR105838]
When constructing a vector<string> from { "strings" }, first is built an
initializer_list<string>, which is then copied into the strings in the
vector. But this is inefficient: better would be treat the { "strings" }
as a range and construct the strings in the vector directly from the
string-literals. We can do this transformation for standard library
classes because we know the design patterns they follow.
PR c++/105838
gcc/cp/ChangeLog:
* call.cc (list_ctor_element_type): New.
(braced_init_element_type): New.
(has_non_trivial_temporaries): New.
(maybe_init_list_as_array): New.
(maybe_init_list_as_range): New.
(build_user_type_conversion_1): Use maybe_init_list_as_range.
* parser.cc (cp_parser_braced_list): Call
recompute_constructor_flags.
* cp-tree.h (find_temps_r): Declare.
gcc/testsuite/ChangeLog:
* g++.dg/tree-ssa/initlist-opt1.C: New test.
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Jason Merrill
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1e1847612d |
c++: fewer allocator temps [PR105838]
In this PR, initializing the array of std::string to pass to the vector initializer_list constructor gets very confusing to the optimizers as the number of elements increases, primarily because of all the std::allocator temporaries passed to all the string constructors. Instead of creating one for each string, let's share an allocator between all the strings; we can do this safely because we know that std::allocator is stateless and that string doesn't care about the object identity of its allocator parameter. PR c++/105838 gcc/cp/ChangeLog: * cp-tree.h (is_std_allocator): Declare. * constexpr.cc (is_std_allocator): Split out from... (is_std_allocator_allocate): ...here. * init.cc (find_temps_r): New. (find_allocator_temp): New. (build_vec_init): Use it. gcc/testsuite/ChangeLog: * g++.dg/tree-ssa/allocator-opt1.C: New test. |
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Jason Merrill
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3da5ae7a34 |
c++: comment
gcc/cp/ChangeLog: * constexpr.cc (maybe_constant_value): Add default arg comments. |
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Sebastian Pop
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09c91caeb8 |
AArch64: Add UNSPECV_PATCHABLE_AREA [PR98776]
Currently patchable area is at the wrong place on AArch64. It is placed immediately after function label, before .cfi_startproc. This patch adds UNSPECV_PATCHABLE_AREA for pseudo patchable area instruction and modifies aarch64_print_patchable_function_entry to avoid placing patchable area before .cfi_startproc. gcc/ PR target/98776 * config/aarch64/aarch64-protos.h (aarch64_output_patchable_area): Declared. * config/aarch64/aarch64.cc (aarch64_print_patchable_function_entry): Emit an UNSPECV_PATCHABLE_AREA pseudo instruction. (aarch64_output_patchable_area): New. * config/aarch64/aarch64.md (UNSPECV_PATCHABLE_AREA): New. (patchable_area): Define. gcc/testsuite/ PR target/98776 * gcc.target/aarch64/pr98776.c: New. * gcc.target/aarch64/pr92424-2.c: Adjust pattern. * gcc.target/aarch64/pr92424-3.c: Adjust pattern. |
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Siddhesh Poyarekar
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955093369e |
testsuite: Fix leaks in tree-dynamic-object-size-0.c
In commit
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Jakub Jelinek
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d9f9d5d30f |
cfgbuild: Fix DEBUG_INSN handling in find_bb_boundaries [PR106719]
The following testcase FAILs on aarch64-linux. We have some atomic
instruction followed by 2 DEBUG_INSNs (if -g only of course) followed
by NOTE_INSN_EPILOGUE_BEG followed by some USE insn.
Now, split3 pass replaces the atomic instruction with a code sequence
which ends with a conditional jump and the split3 pass calls
find_many_sub_basic_blocks.
For -g0, find_bb_boundaries sees the flow_transfer_insn (the new conditional
jump), then NOTE_INSN_EPILOGUE_BEG which can live in between basic blocks
and then the USE insn, so splits block after the NOTE_INSN_EPILOGUE_BEG
and puts the NOTE in between the blocks.
For -g, if sees a DEBUG_INSN after the flow_transfer_insn, so sets
debug_insn to it, then walks over another DEBUG_INSN, NOTE_INSN_EPILOGUE_BEG
until it finally sees the USE insn, and triggers the:
rtx_insn *prev = PREV_INSN (insn);
/* If the first non-debug inside_basic_block_p insn after a control
flow transfer is not a label, split the block before the debug
insn instead of before the non-debug insn, so that the debug
insns are not lost. */
if (debug_insn && code != CODE_LABEL && code != BARRIER)
prev = PREV_INSN (debug_insn);
code I've added for PR81325. If there are only DEBUG_INSNs, that is
the right thing to do, but if in between debug_insn and insn there are
notes which can stay in between basic blocks or simnilarly JUMP_TABLE_DATA
or their associated CODE_LABELs, it causes -fcompare-debug differences.
The following patch fixes it by clearing debug_insn if JUMP_TABLE_DATA
or associated CODE_LABEL is seen (I'm afraid there is no good answer
what to do with DEBUG_INSNs before those; the code then removes them:
/* Clean up the bb field for the insns between the blocks. */
for (x = NEXT_INSN (flow_transfer_insn);
x != BB_HEAD (fallthru->dest);
x = next)
{
next = NEXT_INSN (x);
/* Debug insns should not be in between basic blocks,
drop them on the floor. */
if (DEBUG_INSN_P (x))
delete_insn (x);
else if (!BARRIER_P (x))
set_block_for_insn (x, NULL);
}
but if there are NOTEs, the patch just reorders the NOTEs and DEBUG_INSNs,
such that the NOTEs come first (so that they stay in between basic blocks
like with -g0) and DEBUG_INSNs after those (so that bb is split before
them, so they will be in the basic block after NOTE_INSN_BASIC_BLOCK).
2022-12-08 Jakub Jelinek <jakub@redhat.com>
PR debug/106719
* cfgbuild.cc (find_bb_boundaries): If there are NOTEs in between
debug_insn (seen after flow_transfer_insn) and insn, move NOTEs
before all the DEBUG_INSNs and split after NOTEs. If there are
other insns like jump table data, clear debug_insn.
* gcc.dg/pr106719.c: New test.
|
||
|
Jakub Jelinek
|
1dc49df4ee |
i386: Add *concat<mode><dwi>3_{5,6,7} patterns [PR107627]
On Thu, Dec 01, 2022 at 09:09:51AM +0100, Jakub Jelinek via Gcc-patches wrote:
> BTW, I wonder if we couldn't add additional patterns which would catch
> the case where one of the operands is constant.
The following patch does add those.
The difference with the patch on the 2 testcases is:
baz:
- movq 8(%rsi), %rax
+ movq 8(%rsi), %rsi
+ movq %rdi, %r8
movl %edx, %ecx
- xorl %r8d, %r8d
- xorl %edx, %edx
- movabsq $-2401053089206453570, %r9
- orq %r8, %rax
- orq %r9, %rdx
- shrdq %rdx, %rax
- movq %rax, (%rdi)
+ movabsq $-2401053089206453570, %rdi
+ movq %rsi, %rax
+ shrdq %rdi, %rax
+ movq %rax, (%r8)
qux:
- movq (%rsi), %rax
+ movq %rdi, %r8
+ movq (%rsi), %rdi
movl %edx, %ecx
- xorl %r9d, %r9d
- movabsq $-2401053089206453570, %r8
- movq %rax, %rdx
- xorl %eax, %eax
- orq %r8, %rax
- orq %r9, %rdx
- shrdq %rdx, %rax
- movq %rax, (%rdi)
+ movabsq $-2401053089206453570, %rsi
+ movq %rsi, %rax
+ shrdq %rdi, %rax
+ movq %rax, (%r8)
and
garply:
pushl %esi
- xorl %edx, %edx
+ movl $-559038737, %esi
pushl %ebx
movl 16(%esp), %eax
- orl $-559038737, %edx
movl 20(%esp), %ecx
- movl 4(%eax), %eax
- shrdl %edx, %eax
movl 12(%esp), %edx
+ movl 4(%eax), %ebx
+ movl %ebx, %eax
+ shrdl %esi, %eax
fred:
...
movl 16(%esp), %eax
+ movl $-889275714, %ebx
movl 20(%esp), %ecx
- movl (%eax), %eax
- movl %eax, %edx
- movl $0, %eax
- orl $-889275714, %eax
- shrdl %edx, %eax
movl 12(%esp), %edx
+ movl (%eax), %esi
+ movl %ebx, %eax
+ shrdl %esi, %eax
2022-12-08 Jakub Jelinek <jakub@redhat.com>
PR target/107627
* config/i386/i386.md (HALF, half): New mode attributes.
(*concat<half><mode>3_5, *concat<mode><dwi>3_6,
*concat<mode><dwi>3_7): New define_insn_and_split patterns.
* gcc.target/i386/pr107627-3.c: New test.
* gcc.target/i386/pr107627-4.c: New test.
|
||
|
Andrew MacLeod
|
0ef9991d87 |
Ensure arguments to range-op handler are supported.
PR tree-optimization/107985 gcc/ * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler): Check if type of the operands is supported. * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies): Do not assert if here is no range-op handler. gcc/testsuite/ * g++.dg/pr107985.C: New. |
||
|
Jiufu Guo
|
bb2e5da7ef |
rs6000: Update sign extension computation with sext_hwi
This patch just replaces the expression like: ((value & 0xf..f) ^ 0x80..0) - 0x80..0 to better code(e.g. sext_hwi) for rs6000.cc, rs6000.md and predicates.md (files under rs6000/). gcc/ChangeLog: * config/rs6000/predicates.md: Use sext_hwi. * config/rs6000/rs6000.cc (num_insns_constant_gpr): Likewise. (darwin_rs6000_legitimate_lo_sum_const_p): Likewise. (mem_operand_gpr): Likewise. (mem_operand_ds_form): Likewise. (rs6000_legitimize_address): Likewise. (rs6000_emit_set_const): Likewise. (rs6000_emit_set_long_const): Likewise. (print_operand): Likewise. (constant_generates_xxspltiw): Remove unnecessary expressions. * config/rs6000/rs6000.md: Use sext_hwi. |
||
|
Richard Biener
|
892e8c520b |
tree-optimization/107699 - missed &data._M_elems + _1 != &data._M_elems folding
The following addresses a missed folding noticed in PR107699 that can be fixed amending the existing &x + a != &x + b pattern to also handle the case of only one side having a pointer plus. I'm moving the patterns next to related simpifications showing there'd be an existing pattern matching this if it were not gated with an explicit single_use constraint. Note the new pattern also handles &x.a + a != &x.b, but this hints at some unification / generalization opportunities here. PR tree-optimization/107699 * match.pd (&a !=/== &a.b + c -> (&a - &a.b) !=/== c): New pattern variant. * gcc.dg/tree-ssa/pr107699.c: New testcase. |
||
|
Alexandre Oliva
|
4505270128 |
[PR102706] [testsuite] -Wno-stringop-overflow vs Warray-bounds
The bogus Wstringop-overflow warnings conditionally issued for Warray-bounds-48.c and -Wzero-length-array-bounds-2.c are expected under conditions that depend on the availability of certain vector patterns, but that don't seem to model the conditions under which the warnings are expected. On riscv64-elf and arm-eabi/-mcpu=cortex-r5, for example, though the Warray-bounds-48.c condition passes, we don't issue warnings. On riscv64-elf, we decide not to vectorize the assignments; on cortex-r5, we do vectorize pairs of assignments, but that doesn't yield the expected warning, even though assignments that should trigger the bogus warning are vectorized and associated with the earlier line where the bogus warning would be expected. On riscv64, for Wzero-length-array-bounds-2.c, we issue the expected warning in test_C_global_buf, but we also issue a warning for test_C_local_buf under the same conditions, that would be expected on other platforms but that is not issued on them. On arm-eabi/-mcpu=cortex-r5, the condition passes so we'd expect the warning in both functions, but we don't warn on either. Instead of further extending the effective target tests, introduced to temporarily tolerate these expected bogus warnings, so as to capture the vectorizer analyses that lead to the mismatched decisions, I'm disabling the undesired warnings for these two tests. for gcc/testsuite/ChangeLog PR tree-optimization/102706 * gcc.dg/Warray-bounds-48.c: Disable -Wstringop-overflow. * gcc.dg/Wzero-length-array-bounds-2.c: Likewise. |
||
|
Alexandre Oliva
|
a82c119b1e |
[arm] xfail fp-uint64-convert-double tests
The FP emulation on ARM doesn't take rounding modes into account. The tests require hard_float, but that only tests for calls when adding doubles. There are arm targets that support hardware adds, but that emulate conversions. for gcc/testsuite/ChangeLog * gcc.dg/torture/fp-uint64-convert-double-1.c: Expect fail on arm-*-eabi*. * gcc.dg/torture/fp-uint64-convert-double-2.c: Likewise. |
||
|
Alexandre Oliva
|
c690779637 |
[testsuite] [arm/aarch64] -fno-short-enums for auto-init-[12].c
On arm-eabi, and possibly on other platforms, -fshort-enums is enabled by default, which breaks some tests' expectations as to enum sizes with DEFERRED_INIT. Disable short enums so that the expectations are met. for gcc/testsuite/ChangeLog * c-c++-common/auto-init-1.c: Add -fno-short-enums. * c-c++-common/auto-init-2.c: Likewise. * gcc.dg/debug/btf/btf-enum-1.c: Likewise. |
||
|
Jakub Jelinek
|
716c2d0889 |
range-op-float: frange_arithmetic tweaks for MODE_COMPOSITE_P
As mentioned in PR107967, ibm-ldouble-format documents that +- has 1ulp accuracy, * 2ulps and / 3ulps. So, even if the result is exact, we need to widen the range a little bit. The following patch does that. I just wonder what it means for reverse division (the op1_range case), which we implement through multiplication, when division has 3ulps error and multiplication just 2ulps. In any case, this format is a mess and for non-default rounding modes can't be trusted at all, instead of +inf or something close to it it happily computes -inf. 2022-12-08 Jakub Jelinek <jakub@redhat.com> * range-op-float.cc (frange_nextafter): For MODE_COMPOSITE_P from denormal or zero, use real_nextafter on DFmode with conversions around it. (frange_arithmetic): For mode_composite, on top of rounding in the right direction accept extra 1ulp error for PLUS/MINUS_EXPR, extra 2ulps error for MULT_EXPR and extra 3ulps error for RDIV_EXPR. |
||
|
Andrea Corallo
|
8d4f007398 |
arm: fix mve intrinsics scan body tests for C++
Hi all, this patch is to export the functions defined in these MVE tests as C so the body scan assembler works as expected also for our C++ tests. Best Regards and sorry for the regression! Andrea gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Extern functions as "C". * gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavaq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise. |
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Jakub Jelinek
|
2f187e9893 |
range-op-float: Fix up frange_arithmetic [PR107967]
The addition of PLUS/MINUS/MULT/RDIV_EXPR frange handlers causes
miscompilation of some of the libm routines, resulting in lots of
glibc test failures. A part of them is purely PR107608 fold-overflow-1.c
etc. issues, say when the code does
return -0.5 / 0.0;
and expects division by zero to be emitted, but we propagate -Inf
and avoid the operation.
But there are also various tests where we end up with different computed
value from the expected ones. All those cases are like:
is: inf inf
should be: 1.18973149535723176502e+4932 0xf.fffffffffffffff0p+16380
is: inf inf
should be: 1.18973149535723176508575932662800701e+4932 0x1.ffffffffffffffffffffffffffffp+16383
is: inf inf
should be: 1.7976931348623157e+308 0x1.fffffffffffffp+1023
is: inf inf
should be: 3.40282346e+38 0x1.fffffep+127
and the corresponding source looks like:
static const double huge = 1.0e+300;
double whatever (...) {
...
return huge * huge;
...
}
which for rounding to nearest or +inf should and does return +inf, but
for rounding to -inf or 0 should instead return nextafter (inf, -inf);
The rules IEEE754 has are that operations on +-Inf operands are exact
and produce +-Inf (except for the invalid ones that produce NaN) regardless
of rounding mode, while overflows:
"a) roundTiesToEven and roundTiesToAway carry all overflows to ∞ with the
sign of the intermediate result.
b) roundTowardZero carries all overflows to the format’s largest finite
number with the sign of the intermediate result.
c) roundTowardNegative carries positive overflows to the format’s largest
finite number, and carries negative overflows to −∞.
d) roundTowardPositive carries negative overflows to the format’s most
negative finite number, and carries positive overflows to +∞."
The behavior around overflows to -Inf or nextafter (-inf, inf) was actually
handled correctly, we'd construct [-INF, -MAX] ranges in those cases
because !real_less (&value, &result) in that case - value is finite
but larger in magnitude than what the format can represent (but GCC
internal's format can), while result is -INF in that case.
But for the overflows to +Inf or nextafter (inf, -inf) was handled
incorrectly, it tested real_less (&result, &value) rather than
!real_less (&result, &value), the former test is true when already the
rounding value -> result rounded down and in that case we shouldn't
round again, we should round down when it didn't.
So, in theory this could be fixed just by adding one ! character,
- if ((mode_composite || (real_isneg (&inf) ? real_less (&result, &value)
+ if ((mode_composite || (real_isneg (&inf) ? !real_less (&result, &value)
: !real_less (&value, &result)))
but the following patch goes further. The distance between
nextafter (inf, -inf) and inf is large (infinite) and expressions like
1.0e+300 * 1.0e+300 always produce +inf in round to nearest mode by far,
so I think having low bound of nextafter (inf, -inf) in that case is
unnecessary. But if it isn't multiplication but say addition and we are
inexact and very close to the boundary between rounding to nearest
maximum representable vs. rounding to nearest +inf, still using [MAX, +INF]
etc. ranges seems safer because we don't know exactly what we lost in the
inexact computation.
The following patch implements that.
2022-12-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/107967
* range-op-float.cc (frange_arithmetic): Fix a thinko - if
inf is negative, use nextafter if !real_less (&result, &value)
rather than if real_less (&result, &value). If result is +-INF
while value is finite and -fno-rounding-math, don't do rounding
if !inexact or if result is significantly above max representable
value or below min representable value.
* gcc.dg/pr107967-1.c: New test.
* gcc.dg/pr107967-2.c: New test.
* gcc.dg/pr107967-3.c: New test.
|
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|
Max Filippov
|
ab9fc70149 |
libgcc: xtensa: remove stray symbols from X*HAL macro definitions
libgcc/ * config/xtensa/xtensa-config-builtin.h (XCHAL_NUM_AREGS) (XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE, XCHAL_ICACHE_LINESIZE) (XCHAL_DCACHE_LINESIZE, XCHAL_MMU_MIN_PTE_PAGE_SIZE) (XSHAL_ABI): Remove stray symbols from macro definitions. |
||
|
Ian Lance Taylor
|
9df1ba9a35 |
libbacktrace: support zstd decompression
Support decompressing --compress-debug-sections=zstd. * configure.ac: Check for zstd library and --compress-debug-sections=zstd linker option. * Makefile.am (zstdtest_*): New targets. (zstdtest_alloc_*, ctestzstd_*): New targets. (BUILDTESTS): Add zstdtest, zstdtest_alloc, ctestzstd as appropriate. * elf.c (ELFCOMPRESS_ZSTD): Define. (elf_fetch_bits): Rename from elf_zlib_fetch. Update uses. (elf_fetch_bits_backward): New static function. (ZLIB_HUFFMAN_*): Rename from HUFFMAN_*. Update uses. (ZLIB_TABLE_*): Rename from ZDEBUG_TABLE_*. Update uses. (ZSTD_TABLE_*): Define. (struct elf_zstd_fse_entry): Define. (elf_zstd_read_fse): New static function. (elf_zstd_build_fse): Likewise. (lit): Define if BACKTRACE_GENERATE_ZSTD_FSE_TABLES. (match, offset, next, print_table, main): Likewise. (elf_zstd_lit_table): New static const array. (elf_zstd_match_table, elf_zstd_offset_table): Likewise. (elf_zstd_read_huff): New static function. (struct elf_zstd_seq_decode): Define. (elf_zstd_unpack_seq_decode): New static function. (ZSTD_LIT_*): Define. (struct elf_zstd_literals): Define. (elf_zstd_literal_output): New static function. (ZSTD_LITERAL_LENGTH_BASELINE_OFFSET): Define. (elf_zstd_literal_length_baseline): New static const array. (elf_zstd_literal_length_bits): Likewise. (ZSTD_MATCH_LENGTH_BASELINE_OFFSET): Define. (elf_zstd_match_length_baseline): New static const array. (elf_zstd_match_length_bits): Likewise. (elf_zstd_decompress): New static function. (ZDEBUG_TABLE_SIZE): New definition. (elf_uncompress_chdr): Support ELF_COMPRESS_ZSTD. (backtrace_uncompress_zstd): New function. (elf_add): Use ZLIB_TABLE_SIZE for zlib-gnu sections. * internal.h (backtrace_uncompress_zstd): Declare. * zstdtest.c: New file. * configure, config.h.in, Makefile.in: Regenerate. |
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GCC Administrator
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4bc2d9f6cb | Daily bump. |