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The post-reload splitter currently allows xmm16+ registers with TARGET_EVEX512. The splitter changes SFmode of the output operand to V4SFmode, but the vector mode is currently unsupported in xmm16+ without TARGET_AVX512VL. lowpart_subreg returns NULL_RTX in this case and the compilation fails with invalid RTX. The patch removes support for x/ymm16+ registers with TARGET_EVEX512. The support should be restored once ix86_hard_regno_mode_ok is fixed to allow 16-byte modes in x/ymm16+ with TARGET_EVEX512. PR target/113133 gcc/ChangeLog: * config/i386/i386.md (TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter): Do not handle xmm16+ with TARGET_EVEX512. gcc/testsuite/ChangeLog: * gcc.target/i386/pr113133-1.c: New test. * gcc.target/i386/pr113133-2.c: New test.
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