Takayuki 'January June' Suwa 2379d07ace xtensa: Implement "__force_l32" named address space
In the Xtensa ISA, unless the memory regions for placing machine instructions
are configured as "unified," instructions other than specific 32-bit width
load/store ones are not defined to be able to access data in such regions.

In such cases, data residing in the same memory area as the instructions,
eg., pre-configured constant tables or string literals, cannot be read using
the usual sub-word memory load instructions when reading them in units of
1- or 2-bytes.  Instead, a series of alternative instructions are needed to
extract the desired sub-word bit by bit from the result of loading an aligned
full-word.

This patch introduces a new target-specific named address space "__force_l32"
which indicates that such considerations are necessary when loading sub-words
from memory.

     /* example #1 */
     struct foo {
       short a, b, c, d;
     };
     int test(void) {
       extern __force_l32 struct foo *p;
       return p->a * p->d;
     }

     ;; result #1 (-O2 -mlittle-endian)
     	.literal_position
     	.literal .LC0, p
     test:
     	entry	sp, 32
     	l32r	a9, .LC0	;; the address of p
     	movi.n	a8, -4		;; consolidated by fwprop/CSE
     	l32i.n	a9, a9, 0	;; the value of p
     	addi.n	a10, a9, 6
     	and	a2, a9, a8	;; p->a : align to SImode
     	and	a8, a10, a8	;; p->d : align to SImode
     	l32i.n	a2, a2, 0	;; p->a : load:SI
     	l32i.n	a8, a8, 0	;; p->d : load:SI
     	ssa8l	a9		;; p->a : shift to bit position 0
     	srl	a2, a2
     	ssa8l	a10		;; p->d : shift to bit position 0
     	srl	a8, a8
     	mul16s	a2, a2, a8	;; mulhisi3
     	retw.n

     /* example #2 */
     char *strcpy_irom(char *dst, __force_l32 const char *src) {
       char *p = dst;
       while (*p = *src)
         ++p, ++src;
       return dst;
     }

     ;; result #2 (-Os -mbig-endian)
     strcpy_irom:
     	entry	sp, 32
     	mov.n	a9, a2
     	movi.n	a10, -4		;; hoisted out
     	j	.L2
     .L3:
     	addi.n	a9, a9, 1
     	addi.n	a3, a3, 1
     .L2:
     	and	a8, a3, a10	;; *src : align to SImode
     	l32i.n	a8, a8, 0	;; *src : load:SI
     	ssa8b	a3		;; *src : shift to bit position 0
     	sll	a8, a8
     	extui	a8, a8, 24, 8	;; *src : zero_extract:QI
     	s8i	a8, a9, 0	;; *p   : store:QI
     	bnez.n	a8, .L3
     	retw.n

gcc/ChangeLog:

	* config/xtensa/xtensa-protos.h
	(xtensa_expand_load_force_l32): New function prototype.
	* config/xtensa/xtensa.cc (#include): Add "expmed.h".
	(TARGET_LEGITIMATE_ADDRESS_P):
	Change a whitespace delimiter from HTAB to SPACE.
	(TARGET_ADDR_SPACE_SUBSET_P, TARGET_ADDR_SPACE_CONVERT,
	TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P):
	New macro definitions for named address space.
	(xtensa_addr_space_subset_p, xtensa_addr_space_convert,
	xtensa_addr_space_legitimate_address_p):
	New hook function prototypes and definitions required for
	implementing the named address space.
	(xtensa_expand_load_force_l32): New function that generates RTXes
	that perform loads from memory belonging to the named address
	space.
	* config/xtensa/xtensa.h (ADDR_SPACE_FORCE_L32):
	New macro for the ID# of the named address space.
	(REGISTER_TARGET_PRAGMAS): New hook for registering C language
	identifier for the named address space.
	* config/xtensa/xtensa.md
	(zero_extend<mode>si2_internal): Rename from zero_extend<mode>si2.
	(zero_extend<mode>si2): New RTL generation pattern that calls
	xtensa_expand_load_force_l32().
	(extendhisi2, extendqisi2, movhi, movqi):
	Change to call xtensa_expand_load_force_l32() first.
	(*shift_per_byte): Delete the insn condition.
2026-05-04 00:27:49 -07:00
2026-05-01 00:16:27 +00:00
2026-04-24 00:16:27 +00:00
2026-04-29 00:16:40 +00:00
2026-04-30 00:16:31 +00:00
2026-05-03 00:16:23 +00:00
2026-05-02 00:16:28 +00:00

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