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343e1083eb9f57e05c0caba195f118ef2e95cc40
The following fixes an issue in the RTL combiner where we correctly
combine two vector sign-extends with a vector load
Trying 7, 9 -> 10:
7: r106:V4QI=[r119:DI]
REG_DEAD r119:DI
9: r108:V4HI=sign_extend(vec_select(r106:V4QI#0,parallel))
10: r109:V4SI=sign_extend(vec_select(r108:V4HI#0,parallel))
REG_DEAD r108:V4HI
to
modifying insn i2 9: r109:V4SI=sign_extend([r119:DI])
but since r106 is used we wrongly materialize it using a subreg:
modifying insn i3 10: r106:V4QI=r109:V4SI#0
which of course does not work for modes with more than one component,
specifically vector and complex modes.
PR rtl-optimization/118662
* combine.cc (try_combine): When re-materializing a load
from an extended reg by a lowpart subreg make sure we're
not dealing with vector or complex modes.
* gcc.dg/torture/pr118662.c: New testcase.
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