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This patch introduces an optimization that replaces assignments of signed 12-bit integer values divided by 0th through 15th power of two to hardware FP registers with assignments of that integer values to address (GP) registers followed by negatively-scaled floating-point conversion instructions. For example, 0.12005615234375f is exactly equal to (1967.f / (1 << 14)), so we can emit such as: movi a9, 1967 float.s f0, a9, 14 if such conversion reduces costs. gcc/ChangeLog: * config/xtensa/xtensa.cc (xt_full_rtx_costs): New struct, derived from full_rtx_costs. (FPreg_neg_scaled_simm12b_1, FPreg_neg_scaled_simm12b): New worker functions. (do_largeconst): Add a call to FPreg_neg_scaled_simm12b() to the insn enumeration loop.
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