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This patch introduces the pipeline description for the Synopsys RMX-100 series processor to the RISC-V GCC backend. The RMX-100 has a short, three-stage, in-order execution pipeline with configurable multiply unit options. The option -mmpy-option was added to control which version of the MPY unit the core has and what the latency of multiply instructions should be similar to ARCv2 cores (see gcc/config/arc/arc.opt:60). gcc/ChangeLog: * config/riscv/riscv-cores.def (RISCV_TUNE): Add arc-v-rmx-100-series. * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): Add arcv_rmx100. (enum arcv_mpy_option_enum): New enum for ARC-V multiply options. * config/riscv/riscv-protos.h (arcv_mpy_1c_bypass_p): New declaration. (arcv_mpy_2c_bypass_p): New declaration. (arcv_mpy_10c_bypass_p): New declaration. * config/riscv/riscv.cc (arcv_mpy_1c_bypass_p): New function. (arcv_mpy_2c_bypass_p): New function. (arcv_mpy_10c_bypass_p): New function. * config/riscv/riscv.md: Add arcv_rmx100. * config/riscv/riscv.opt: New option for RMX-100 multiply unit configuration. * doc/riscv-mtune.texi: Document arc-v-rmx-100-series. * config/riscv/arcv-rmx100.md: New file. Co-authored-by: Artemiy Volkov <artemiyv@acm.org> Co-authored-by: Luis Silva <luiss@synopsys.com> Signed-off-by: Michiel Derhaeg <michiel@synopsys.com>
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