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or1k: Allow SImode for condition flag register

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eb2ea476db emit-rtl: Allow extra checks for paradoxical subregs [PR119966]

changed validate_subreg to return false on the paradoxical SImode subreg
of the OpenRISC condition flag register (reg:BI sr_f), which triggered

internal compiler error: in emit_move_multi_word, at expr.cc:4497

c0694f95f5 or1k: Fix ICE in libgcc caused by recent validate_subreg changes

changed or1k_can_change_mode_class to allow changing flags mode from BI
to SI.  But or1k_hard_regno_mode_ok still returns false for condition
flag register in SImode.  Update or1k_hard_regno_mode_ok to also allow
condition flag register in SImode.

Tested with or1k Linux cross compiler for or1k glibc build.

gcc/

	PR target/120587
	PR target/125155
	* config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Allow condition
	condition flag register in SImode.

gcc/testsuite/

	PR target/120587
	PR target/125155
	* gcc.target/or1k/pr125155.c: New test.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
This commit is contained in:
H.J. Lu
2026-05-04 05:08:51 +08:00
parent d54aaab350
commit 710581c80b
2 changed files with 18 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
gcc/config/or1k/or1k.cc
View File

@@ -1389,10 +1389,11 @@ or1k_trampoline_init (rtx m_tramp, tree fndecl, rtx chain)
static bool
or1k_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
{
/* For OpenRISC, GENERAL_REGS can hold anything, while
FLAG_REGS are really single bits within SP[SR]. */
/* For OpenRISC, GENERAL_REGS can hold anything, while FLAG_REGS are
really single bits within SP[SR]. Also allow condition flag register
in SImode to match or1k_can_change_mode_class. */
if (REGNO_REG_CLASS (regno) == FLAG_REGS)
return mode == BImode;
return mode == BImode || mode == SImode;
return true;
}

14
gcc/testsuite/gcc.target/or1k/pr125155.c Normal file
View File

@@ -0,0 +1,14 @@
/* { dg-do compile } */
/* { dg-options "-O2" } */
int __pthread_keys_0_0;
int
___pthread_key_delete (void)
{
int result = 22;
int __atg3_old = 0;
if (__atomic_compare_exchange_n (&__pthread_keys_0_0, &__atg3_old,
0, 0, 2, 0))
result = 0;
return result;
}