Commit Graph

227330 Commits

Author SHA1 Message Date
H.J. Lu
fecf542e1d Add default_promote_function_mode_sign_extend
TARGET_PROMOTE_PROTOTYPES is an optimization, not an ABI requirement.
TARGET_PROMOTE_FUNCTION_MODE should be used for ABI requirement.  Like
xtensa, mcore ABI requires sign extension of signed 8/16-bit integer
arguments to 32 bits and zero extension of unsigned integer 8/16-bit
arguments to 32 bits:

1. Rename xtensa_promote_function_mode to
default_promote_function_mode_sign_extend to sign-extend signed 8/16-bit
integer arguments to 32 bits and zero-extend of unsigned 8/16-bit
integer arguments to 32 bits.
2. Replace xtensa_promote_function_mode with
default_promote_function_mode_sign_extend.
3. Remove TARGET_PROMOTE_PROTOTYPES for mcore and define
TARGET_PROMOTE_FUNCTION_MODE with
default_promote_function_mode_sign_extend to properly extend 8/16-bit
arguments to 32 bits.

Targets with the same ABI requirement should define
TARGET_PROMOTE_FUNCTION_MODE with
default_promote_function_mode_sign_extend.

gcc/

	PR target/119979
	PR target/120888
	* targhooks.cc (default_promote_function_mode_sign_extend): New.
	* targhooks.h (default_promote_function_mode_sign_extend):
	Likewise.
	* config/mcore/mcore.cc (TARGET_PROMOTE_FUNCTION_MODE): Use
	default_promote_function_mode_sign_extend.
	(TARGET_PROMOTE_PROTOTYPES): Removed.
	* config/xtensa/xtensa.cc (xtensa_promote_function_mode): Removed.
	(TARGET_PROMOTE_FUNCTION_MODE): Use
	default_promote_function_mode_sign_extend.

gcc/testsuite/

	PR target/119979
	PR target/120888
	* gcc.target/xtensa/pr120888-1.c: Removed to ...
	* gcc.dg/zero-extend.c: This.  Enable for mcore and xtensa.
	* gcc.target/xtensa/pr120888-2.c: Removed to ...
	* gcc.dg/sign-extend.c: This.  Enable for mcore and xtensa.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2026-02-26 15:52:34 +08:00
David Malcolm
f8380ded1f analyzer: fix ICE on putenv of a field [PR124232]
store::mark_as_escaped requires the region passed in to be a base
region, but the analyzer's implementation of putenv wasn't respecting
that.

Fixed thusly.

gcc/analyzer/ChangeLog:
	PR analyzer/124232
	* kf.cc (kf_putenv::impl_call_pre): Use base region when marking
	pointer as having escaped.

gcc/testsuite/ChangeLog:
	PR analyzer/124232
	* gcc.dg/analyzer/putenv-ice-pr124232.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2026-02-25 21:50:58 -05:00
GCC Administrator
6557358b39 Daily bump. 2026-02-26 00:16:29 +00:00
Jose E. Marchesi
c073172dfd a68: handle Darwin's #1/NN archive members
In Darwin archives use an extension to encode the member names
off-header, in the first bytes of the contents.  The name in the
header proper is then #1/NN... where NN... is an ascii-encoded number
in decimal with the length of the name, which is encoded right after
the header as part of the contents.

This patch fixes the Algol 68 module importing from archives in Darwin
by acknowledging this extension.  Note that, for the moment, we don't
bother to fetch the actual member name.  This can lead to poor
diagnostics, so we probably will fix that at some point.

Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>

gcc/algol68/ChangeLog

	* a68-imports-archive.cc (Archive_file): Handle Darwin #1/NN
	archive members.
2026-02-26 00:43:03 +01:00
Jose E. Marchesi
8837167567 a68: do not revise lower bounds in trimmers with trimscripts
Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>

gcc/algol68/ChangeLog

	* a68-low-units.cc (lower_subscript_for_trimmers): Do not revise
	bounds if no trimscript.

gcc/testsuite/ChangeLog

	* algol68/execute/trimmer-13.a68: New test.
2026-02-26 00:07:57 +01:00
Philipp Tomsich
429a5fe400 avoid-store-forwarding: Fix sbitmap memory leak in process_store_forwarding
forwarded_bytes was allocated with sbitmap_alloc but never freed on any
of the function's return paths.  Use auto_sbitmap instead, which calls
sbitmap_free in its destructor.

gcc/ChangeLog:

	* avoid-store-forwarding.cc
	(store_forwarding_analyzer::process_store_forwarding): Use
	auto_sbitmap for forwarded_bytes to ensure it is freed on all
	return paths.

Reviewed-By: Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu>
2026-02-25 23:01:39 +01:00
Philipp Tomsich
34fb8d5131 avoid-store-forwarding: Fix wrong counter in statistics reporting
update_stats() reported stats_sf_detected for both the "detected" and
"avoided" counters.  The second should report stats_sf_avoided.

gcc/ChangeLog:

	* avoid-store-forwarding.cc
	(store_forwarding_analyzer::update_stats): Use stats_sf_avoided
	for the "avoided" counter.

Reviewed-By: Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu>
2026-02-25 23:01:39 +01:00
Philipp Tomsich
e215a463e5 avoid-store-forwarding: Fix include order and drop cselib.h include
The header file included config.h, system.h, coretypes.h,
backend.h, and rtl.h directly, which is unconventional for GCC
headers.  Strip those includes from the header and fix the include
order in the .cc file so that config.h comes first.  Also remove
the unused cselib.h include.

gcc/ChangeLog:

	* avoid-store-forwarding.cc: Move config.h before
	avoid-store-forwarding.h; place avoid-store-forwarding.h
	after rtl.h; remove unused cselib.h include.
	* avoid-store-forwarding.h: Remove includes of config.h,
	system.h, coretypes.h, backend.h, rtl.h.

Reviewed-By: Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu>
2026-02-25 23:01:39 +01:00
Nathan Myers
e84da9c1d4 libstdc++: debug impls for heterogeneous erasure overloads (P2077) [PR117404]
Implement the debug versions of new overloads from P2077.

libstdc++-v3/ChangeLog:
	PR libstdc++/117404
	* include/debug/map.h (extract, erase): Define overloads.
	* include/debug/multimap.h: Same.
	* include/debug/multiset.h: Same.
	* include/debug/set.h: Same.
	* include/debug/unordered_map: Same (2x).
	* include/debug/unordered_set: Same (2x), rename some locals.
2026-02-25 16:43:52 -05:00
Christopher Albert
e0b70284cf fortran: Fix ICE in ALLOCATE of sub-objects with recursive types
The deep-copy wrapper generation for recursive allocatable array
components (PR121628) calls cgraph_node::add_new_function to register
the wrapper.  During PARSING state, add_new_function calls
finalize_function which triggers ggc_collect().  This garbage
collection frees locally-computed tree nodes (COMPONENT_REFs etc.)
in caller stack frames of structure_alloc_comps that are not yet
attached to any GC-rooted structure, causing a segfault when those
nodes are subsequently accessed.

Use finalize_function with no_collect=true to skip the collection.
The GC will run at a safe point later.

	PR fortran/124235

gcc/fortran/ChangeLog:

	* trans-array.cc (generate_element_copy_wrapper): Use
	cgraph_node::finalize_function with no_collect=true instead
	of cgraph_node::add_new_function to avoid garbage collection
	while caller frames hold unrooted tree nodes.

gcc/testsuite/ChangeLog:

	* gfortran.dg/pr124235.f90: New test.

Signed-off-by: Christopher Albert <albert@tugraz.at>
2026-02-25 12:24:24 -08:00
Marek Polacek
c6da5b9c32 c++/reflection: remove FIXME in members_of5.C
The use is no longer needed.

gcc/testsuite/ChangeLog:

	* g++.dg/reflect/members_of5.C: Remove a FIXME and declaration.
2026-02-25 13:35:49 -05:00
Cupertino Miranda
fb7bfbaa91 bpf: Split expressions for proper CO-RE code generation
This patch corrects CO-RE generation for the cases where an expression
starts with a non-CO-RE access, but in the middle it requires to
generate CO-RE to correctly compute the access location.

It fixes it by splitting the expression into their CO-RE and non-CO-RE
counterparts. It performs this by walking gimple expressions, and for
each field access to which its type is a struct or union, it verifies if
both the types for the base and field are attributed similarly.
Otherwise, it splits the expression at this location by creating a
temporary variable and performing any required pointer conversions.
This smaller expressions are converted to CO-RE in the subsequent
gimple walker.

There is no way in GCC to distinguish nested struct/union definitions
from non-nested ones.
This patch simplifies code and enforces that all preserve_access_index
structs/unions would be attributed explicitly.
Previous approach was error prone as it would extend CO-RE accesses to
structures which would not be attributed.

All GCC BPF dejagnu passes tests:
  # of expected passes		553
  # of expected failures		6

kernel-next bpf selftests:
 before: Summary: 543/4888 PASSED, 113 SKIPPED, 136 FAILED
 after:  Summary: 545/4893 PASSED, 113 SKIPPED, 134 FAILED

gcc/ChangeLog:
	PR target/120241
	* config/bpf/core-builtins.cc
	(is_attr_preserve_access): Correct for pointer types.
	(maybe_get_base_for_field_expr, core_access_index_map,
	core_access_clean, core_is_access_index, core_mark_as_access_index):
	Remove.
	(make_gimple_core_safe_access_index): Remove function.
	(struct walker_data): New struct to pass data to tree walker.
	(callback_should_do_core_access, should_do_core_access): Add
	function to identify expressions that should not be converted to
	CO-RE.
	(core_make_builtins): Add callback tree walker function to
	convert expressions to CO-RE.
	(callback_find_next_split_location, core_should_split_expr,
	find_next_split_location, gimple_core_early_split_expr): Add
	function to split expressions in CO-RE and non-CO-RE
	expressions.
	(execute_lower_bpf_core): Adapt to new code.
	* config/bpf/bpf.opt: Add option Wco-re.
	* doc/invoke.texi: Add documentation for Wco-re.

gcc/testsuite/ChangeLog:
	PR target/120241
	* gcc.target/bpf/core-attr-3.c: Add attribute.
	* gcc.target/bpf/core-attr-4.c: Add attribute.
	* gcc.target/bpf/core-attr-5.c: Add attribute.
	* gcc.target/bpf/core-attr-6.c: Add attribute.
	* gcc.target/bpf/core-attr-7.c: New test.
	* gcc.target/bpf/core-attr-calls.c: Adapt.
2026-02-25 17:59:25 +00:00
Andrew Pinski
b9c4b9e9f9 fn-split: Move clobbers from the old exit bb to new call block after the call [PR110091]
After outlinining the bbs for function splitting, we move the clobbers that were in the
last bb to be after the newly calling function.
This allows for stack location sharing and more when the non split out part is inlined
into another function.

This also fixes some of the warnings about dangling-pointers because
the clobbers are now correctly handled while function splitting.
The testcases test for the cases where the dangling-pointers pointer
warnings would show up too.

Note only end of storage clobbers in this case.

Changes since v1:
 * v2: Add comments and add a call to unlink_stmt_vdef/release_ssa_name.

Bootstrapped and tested on x86_64-linux-gnu.

	PR tree-optimization/110091

gcc/ChangeLog:

	* ipa-split.cc (split_function): Find the bb
	which is used for return in the outlined function.
	Move the clobbers that are at the end of that bb
	to be after the new call.

gcc/testsuite/ChangeLog:

	* gcc.dg/tree-ssa/pr110091-3.c: New test.
	* gcc.dg/tree-ssa/pr110091-4.c: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
2026-02-25 08:34:29 -08:00
Andrew Pinski
a9112128ee fn-split: Insert new call after clobbers/debug stmt [PR110091]
So for function splitting when we outlined the function, we
should keep around the clobbers that were at the begining of
the bb which will be outlined. So change the last stmt
to where we split the bb for where the function call will be
to be after the clobbers.

Note we have to ignore the debug stmts here otherwise you would
get a debug comparison failure.

This also fixes some of the warnings about dangling-pointers because
the clobbers are now correctly handled while function splitting.
The testcases test for the cases where the dangling-pointers pointer
warnings would show up too.

Note only end of storage clobbers in this case.

Bootstrapped and tested on x86_64-linux-gnu.

	PR tree-optimization/110091

gcc/ChangeLog:

	* ipa-split.cc (split_function): Split after
	the clobbers/debug stmts rather than after the labels.

gcc/testsuite/ChangeLog:

	* gcc.dg/tree-ssa/pr110091-1.c: New test.
	* gcc.dg/tree-ssa/pr110091-2.c: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
2026-02-25 08:34:28 -08:00
Marek Polacek
57c789b584 c++/reflection: remove TODO in compare9.C
This compiles since r16-7472-gae37ade22ecf4e.  Yay!

gcc/testsuite/ChangeLog:

	* g++.dg/reflect/compare9.C: Uncomment the commented out asserts.
2026-02-25 10:40:28 -05:00
Takayuki 'January June' Suwa
9e0c784a85 xtensa: Add 'spaceshipsi4' insn pattern
When TARGET_SALT is configured in the Xtensa ISA, a Boolean evaluation of
LT/GT[U] between address (GP) registers can be done in a single machine
instruction, making it easy to implement the spaceship operator by sub-
tracting one from the other result.

     /* examples */
     int test0(int a, int b) {
       return a == b ? 0 : (a > b ? 1 : -1);
     }
     int test1(unsigned int a, unsigned int b) {
       return a == b ? 0 : (a > b ? 1 : -1);
     }

     ;; before (-msalt)
     test0:
     	entry	sp, 32
     	mov.n	a8, a2
     	movi.n	a2, 0
     	beq	a8, a3, .L1
     	movi.n	a2, -1
     	bge	a3, a8, .L1
     	movi.n	a2, 1
     .L1:
     	retw.n
     test1:
     	entry	sp, 32
     	mov.n	a8, a2
     	movi.n	a2, 0
     	beq	a8, a3, .L6
     	movi.n	a2, -1
     	bgeu	a3, a8, .L6
     	movi.n	a2, 1
     .L6:
     	retw.n

     ;; after (-msalt)
     test0:
     	entry	sp, 32
     	salt	a8, a2, a3
     	salt	a2, a3, a2
     	sub	a2, a2, a8
     	retw.n
     test1:
     	entry	sp, 32
     	saltu	a8, a2, a3
     	saltu	a2, a3, a2
     	sub	a2, a2, a8
     	retw.n

gcc/ChangeLog:

	* config/xtensa/xtensa.md (spaceshipsi4):
	New RTL generation pattern.
2026-02-25 06:54:10 -08:00
Tamar Christina
dda0023713 testsuite: Fix default on arm_v8_3a_fp16_complex_neon_hw [PR124236]
check_effective_target_arm_v8_3a_complex_neon_hw was return 1 instead of 0
whenever armv8.3-a wasn't supported.

This fixes it.

gcc/testsuite/ChangeLog:

	PR target/124236
	* lib/target-supports.exp
	(check_effective_target_arm_v8_3a_complex_neon_hw): Fix default value.
2026-02-25 13:39:29 +00:00
Marek Polacek
6441bc34bc c++/reflection: also walk BIND_EXPR_BODY
As discussed in
<https://gcc.gnu.org/pipermail/gcc-patches/2026-January/705756.html>,
we shouldn't walk BIND_EXPR_VARS in check_out_of_consteval_use_r, but
BIND_EXPR_BODY should still be walked.

The IF_STMT is there so that we don't emit bogus errors in "if consteval"
branches, as tested in expr12.C.

gcc/cp/ChangeLog:

	* reflect.cc (check_out_of_consteval_use_r): Walk BIND_EXPR_BODY.
	For IF_STMT_CONSTEVAL_P, only walk the ELSE_CLAUSE.  For
	IF_STMT_CONSTEXPR_P, only walk the THEN_ and ELSE_CLAUSE.

gcc/testsuite/ChangeLog:

	* g++.dg/reflect/expr11.C: Test more if constexpr.
	* g++.dg/reflect/expr12.C: Adjust test.

Reviewed-by: Jason Merrill <jason@redhat.com>
2026-02-25 08:32:15 -05:00
Marek Polacek
1aed3a853e c++/reflection: fix ICE with OMP_CLAUSE [PR124227]
This test crashes with -fopenmp -freflection because consteval_only_p
gets

  <omp_clause 0x7fffe99db120
    type <tree_vec 0x7fffe982b900 length:3>
    reduction
    op-0: <var_decl 0x7fffe99d6390 acc>
    op-1: <init_expr 0x7fffe99c9870>
    op-2: <bind_expr 0x7fffe982b8a0>
    op-3: <var_decl 0x7fffe99d6428 D.2864>
    op-4:>

so it takes its type, but complete_type crashes on a TREE_VEC.

So let's handle TREE_VEC in consteval_only_p.

	PR c++/124227

gcc/cp/ChangeLog:

	* reflect.cc (consteval_only_p): Handle TREE_VEC.

gcc/testsuite/ChangeLog:

	* g++.dg/reflect/pr124227.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
2026-02-25 08:30:19 -05:00
Eric Botcazou
b70d28d47a Ada: Fix missing implicit dereference for access-to-protected used as prefix
... of access-related attribute.  This is a regression present on all active
branches caused by a local resolution of the N_Selected_Component node.

gcc/ada/
	PR ada/124226
	* sem_res.adb (Resolve_Implicit_Dereference): Move declaration to...
	* sem_res.ads (Resolve_Implicit_Dereference): ...here.
	* sem_attr.adb (Resolve_Attribute) <Attribute_Access>: Also call
	Resolve_Implicit_Dereference when resolving a protected operation.

gcc/testsuite/
	* gnat.dg/protected_deref1.adb: New test.
2026-02-25 14:02:17 +01:00
Richard Biener
6e461b3789 target/120234 - adjust vector construction costs
The following allows vectorizing the gcc.target/i386/pr111023*.c
testcases again with -m32 -msse2 by ensuring we see through a cast
when looking for vector extract sources during costing of vector construction.

This, together with the forwprop fix fixes the regression on those testcases.

	PR target/120234
	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
	For constructor elements always look through a conversion.
	Rewrite load and vector extraction matching to be more obvious.
	Allow arbitrary conversions from the vector extract to elide
	costing of a gpr<->xmm move.
2026-02-25 09:16:02 +01:00
Iain Sandoe
0bdbd1fa48 libiberty, Darwin: Fix handling of file offsets.
In the case where a Mach-O object is embedded inside some container
(e.g. an archive) we must account the offset from the start of that
container when reading.  In most cases, this has been done correctly.
However, we were missing the case for reading segment data.  This
only showed up once we tried using archives (since regular Mach-O
objects start at the begining of the file).

Fixed thus.

libiberty/ChangeLog:

	* simple-object-mach-o.c
	(simple_object_mach_o_segment): Account for the offset of
	this Mach-O object from the start of any container.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2026-02-25 06:44:49 +00:00
Andrew Pinski
772499fd7e aarch64: early-ra: Fix handling of multi-register allocation with clobbers [PR123285]
So the problem here is while forming chains, we don't process hard register
conflicts (and ABI based ones) for allocnos which are already part of a chain.
This means sometimes we allocate a register to a color which might be clobbered
over is live range.
Processing clobbers for all allocnos don't work while forming a chain does
not work as the chain's front allocnos' candidates does not get updated.
So we need to the processing of clobbers (and ABI clobbers) before starting
to form the chains.

Changes since v1:
 * v2: remove accidental hack which was there just for testing.
 * v3: Move the copying of the shared part to new earlier loop too.
       Fix small white space issue.

Bootstrappd and tested on aarch64-linux-gnu.

	PR target/123285

gcc/ChangeLog:

	* config/aarch64/aarch64-early-ra.cc (early_ra::form_chains): Process clobbers
	and ABI clobbers before starting to form the chain.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pr123285-1.c: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
2026-02-24 19:39:55 -08:00
Christopher Albert
97965bdc1e fortran: Fix iterator counting in nested block scopes [PR fortran/124208]
Count FORALL/DO CONCURRENT iterators in EXEC_BLOCK namespace code chains
while sizing VAR_EXPR in gfc_resolve_forall.

This prevents undersized allocation and an ICE for nested FORALL/DO
CONCURRENT inside ASSOCIATE/BLOCK constructs.

	PR fortran/124208

gcc/fortran/ChangeLog:

	* resolve.cc (gfc_max_forall_iterators_in_chain): Count
	iterators in EXEC_BLOCK namespaces.

gcc/testsuite/ChangeLog:

	* gfortran.dg/pr124208.f90: New test.

Signed-off-by: Christopher Albert <albert@tugraz.at>
2026-02-24 18:30:06 -08:00
Jonathan Yong
f8aa3f26d8 gcc.dg/plugin: fix spurious llp64 warnings
Fixes compile tests with mingw-w64.

gcc/testsuite/ChangeLog:

	* gcc.dg/plugin/taint-pr112850-precise.c:
	(__kernel_ulong_t): Change unsigned long to __UINTPTR_TYPE__.
	(__kernel_size_t): Change __kernel_ulong_t to __kernel_size_t.
	(copy_from_user): Change unsigned long n to size_t n.
	(snd_rawmidi_ioctl): Change unsigned long arg to uintptr_t arg.
	* gcc.dg/plugin/taint-pr112850-too-complex.c: Ditto.
	* gcc.dg/plugin/taint-pr112850-unsanitized.c: Ditto.
	* gcc.dg/plugin/taint-pr112850.c: Ditto.

Signed-off-by: Jonathan Yong <10walls@gmail.com>
2026-02-25 00:30:17 +00:00
GCC Administrator
4441538189 Daily bump. 2026-02-25 00:16:33 +00:00
Sandra Loosemore
997c9be555 doc: Fix the attribute urlifier after changes to indexing [PR88472]
Recent patches to the GCC manual have merged previously-separate
sections for function, variable, type, and statement attributes, and
created a separate index for attributes instead of putting them in the
concept index.  This reorganization broke the attribute URLifier and its
self-tests.  I've fixed it up and regenerated attr-urls.def.

gcc/ChangeLog
	PR other/88472
	* Makefile.in (ATTR_URLS_HTML_DEPS): Point at new index file.
	* attr-urls.def: Regenerated.
	* gcc-attribute-urlifier.cc (test_attribute_urlifier): Adjust
	URLs to match formatting in the new index.
	* regenerate-attr-urls.py (parse_html_line_attribute_index):
	Update pattern to match formatting in the new combined index.
	Don't segregate entries into separate function/variable/etc
	arrays.
	(INDEX_REL_PATH): Point at the new index file.
	(class TestParsingIndex): Update patterns in self-tests to match
	the current formatting.
2026-02-24 23:25:32 +00:00
Sandra Loosemore
b80df4142b doc: Put attributes in their own index [PR88472]
GCC has so many attributes nowadays that having a dedicated index for
them seems long overdue.

gcc/ChangeLog
	PR other/88472
	* doc/extend.texi (Common Attributes): Change @cindex entries for
	attributes to @atindex.  Add some additional @cindex entries.
	(AArch64 Attributes): Likewise.
	(AMD GCN Attributes): Likewise.
	(ARC Attributes): Likewise.
	(ARM Attributes): Likewise.
	(AVR Attributes): Likewise.
	(Blackfin Attributes): Likewise.
	(BPF Attributes): Likewise.
	(C-SKY Attributes): Likewise.
	(Epiphany Attributes): Likewise.
	(H8/300 Attributes): Likewise.
	(IA-64 Attributes): Likewise.
	(LoongArch Attributes): Likewise.
	(M32C Attributes): Likewise.
	(M32R/D Attributes): Likewise.
	(m68k Attributes): Likewise.
	(MicroBlaze Attributes): Likewise.
	(Microsoft Windows Attributes): Likewise.
	(MIPS Attributes): Likewise.
	(MSP430 Attributes): Likewise.
	(NDS32 Attributes): Likewise.
	(Nvidia PTX Attributes): Likewise.
	(PowerPC Attributes): Likewise.
	(RISC-V Attributes): Likewise.
	(RL78 Attributes): Likewise.
	(RX Attributes): Likewise.
	(S/390 Attributes): Likewise.
	(SH Attributes): Likewise.
	(Symbian OS Attributes): Likewise.
	(V850 Attributes): Likewise.
	(Visium Attributes): Likewise.
	(x86 Attributes): Likewise.
	(Xstormy16 Attributes): Likewise.
	(C++ Attributes): Likewise.
	* doc/gcc.texi: Define a new "at" index for attributes.
	(Attribute Index): New appendix.
2026-02-24 23:25:32 +00:00
Sandra Loosemore
991a62f5b6 doc: Consolidate documentation for naked attribute [PR88472]
This attribute has been documented similarly in the sections for 12
different targets.  I think it's time to promote this to a common
attribute and document it only once with a warning that it's not
supported everywhere.

gcc/ChangeLog
	PR other/88472
	* doc/extend.texi (Common Attributes): Document the "naked"
	attribute here.
	(ARC Attributes): Delete entry for "naked".
	(ARM Attributes): Likewise.
	(AVR Attributes): Likewise.
	(BPF Attributes): Likewise.
	(C-SKY Attributes): Likewise.
	(MCORE Attributes): Delete entire section since "naked" was
	the only thing listed.
	(MSP430 Attributes): Delete entry for "naked".
	(NDS32 Attributes): Likewise.
	(RISC-V Attributes): Likewise.
	(RL78 Attributes): Likewise.
	(RX Attributes): Likewise.
	(x86 Attributes): Likewise.
2026-02-24 23:25:32 +00:00
Sandra Loosemore
fe41e09d9d doc: Consolidate hot/cold attribute documentation [PR88472]
gcc/ChangeLog
	PR other/88472
	* doc/extend.texi (Common Attributes): Consolidate documentation
	for "cold" and "hot" attributes, including the C++-specific
	behavior.
	(C++ Attributes): Likewise, just point to the main entry.
2026-02-24 23:25:31 +00:00
Sandra Loosemore
ea9eb0dc1a doc, riscv: Tidy RISC-V attribute documentation
gcc/ChangeLog
	* doc/extend.texi (RISC-V Attributes): Format and index options
	for the "target" attribute consistently with the documentation
	for other back ends.
2026-02-24 23:25:31 +00:00
Sandra Loosemore
92fbbbcaf2 doc, loongarch: Clean up LoongArch attribute documentation
This section of the manual was in need of general tidying for grammar
and markup, as well as correcting confusion resulting from using "attribute"
to refer both to the target attribute and its individual arguments.  I also
added LoongArch to the lists of targets supporting target_clones and
target_version in other sections of the manual.

gcc/ChangeLog
	* doc/extend.texi (Common Attributes): Add LoongArch to lists of
	targets supporting target_clones and target_version.
	(LoongArch Attributes): Copy-edit for grammar and markup.  Wrap
	excessively long lines.  Rearrange the introductory material for
	the target attribute.  Correct index entries for target attribute
	options.
	(Function Multiversioning): Add LoongArch to list of targets
	supporting this feature.  Fix nearby typo.
2026-02-24 23:25:31 +00:00
Sandra Loosemore
f4f57d7eaf doc, aarch64: Tidy AArch64 target attribute documentation
The presentation in this section previously documented and referred to
the options that could be specified in the "target" attribute string
as if they were attributes themselves, which was quite confusing.  I've
straightened out the terminology and reorganized the text to put the
introductory material and examples first instead of at the end, and fixed
the markup and formatting to match what's already used for other targets
that support this attribute.

gcc/ChangeLog
	* doc/extend.texi (AArch64 Attributes): Reorganize material in this
	section, correct terminology and formatting.
2026-02-24 23:25:30 +00:00
Sandra Loosemore
88b619126c doc: General copy-editing in Attributes section
This patch fixes a number of copy-editing issues in the attributes
documentation that are not specifically related to the restructuring
of this section for PR88472.  This includes typos, grammatical errors
like inappropriate verb tenses, switching from passive to active
voice, missing or incorrect markup, missing @noindent after examples,
hbox overflows in the PDF manual, and so on.

gcc/ChangeLog
	* doc/extend.texi (Attributes): General copy-editing.
	(C++ Attributes): Likewise.
2026-02-24 23:25:30 +00:00
Sandra Loosemore
a46ce9eb00 doc: Tag attributes with what they apply to [PR88472]
After merging the lists of function/variable/type/etc attributes, it
wasn't always clear what particular attributes applied to without
reading through the description.  This patch adopts the practice from
the C standard of starting each attribute section with a paragraph
describing what it can apply to.  In many cases this just involved
adding a paragraph break after the first sentence of the description;
others required a bit of rephrasing too.

gcc/ChangeLog
	PR other/88472
	* doc/extend.texi (Attributes): Start each attribute's
	documentation with a short paragraph describing what it applies to.
	(C++ Attributes): Likewise.
2026-02-24 23:25:22 +00:00
Sandra Loosemore
6e3c137f5d doc: Merge function, variable, type, and statement attribute sections [PR88472]
The previous organization of the Attributes section of the manual was like

Attributes
  Function Attributes
    Common Function Attributes
    + various subsections by target
  Variable Attributes
    Common Variable Attributes
    + various subsections by target
  Type Attributes
    likewise
  Label Attributes
  Enumerator Attributes
  Statement Attributes
  GNU Attribute Syntax

There was a bunch of introductory text duplicated at the top of the
sections for each kind of attribute, and many attributes were listed
in multiple places -- particularly linker-related attributes like
"section" that apply to both functions and variables with the same
semantics.

The material has been reorganized by merging the corresponding
sections for each kind of attribute:

Attributes
  Common Attributes
  Target-Specific Attributes
    + various subsections by target
  GNU Attribute Syntax

Most of the previous boilerplate introductory text for each subsection
has been discarded since it's been replaced by a general introduction
in the top-level Attributes section in a previous patch of this
series.  The duplicate entries for different kinds of attributes of
the same name have been merged and in some cases I reworded things to
provide explicit context about what entities the attribute applies to.

gcc/ChangeLog
	PR other/88472
	* doc/extend.texi (Attributes): Merge respective subsections of
	Function Attributes, Variable Attributes, Type Attributes,
	Label Attributes, Enumerator Attributes, and Statement Attributes
	into new sections Common Attributes and Target-Specific Attributes.
	Fix cross-references.
	* doc/invoke.texi: Fix cross-references.
	* doc/trouble.texi: Likewise.
2026-02-24 23:20:46 +00:00
Sandra Loosemore
7733ed8b1a doc: Rewrite/reorganize discussion of attribute syntax [PR102397]
Now that GCC's default language dialect for both C and C++ includes
support for the standard attribute syntax, we should encourage users
to prefer that instead of the legacy GNU syntax, while recognizing
that there is a lot of code out there using the latter.  This patch
updates the discussion in the introduction to the Attributes section
with examples showing attribute placement in both syntaxes and focuses
the syntax section on the GNU syntax only.  (Users can read the C/C++
standards, programming books or tutorials, etc to learn about the
standard syntax, so we don't need to document that in detail.)

gcc/ChangeLog
	PR c++/102397
	* doc/extend.texi (Attributes): Rewrite and expand discussion
	of standard vs legacy syntax, with several examples.
	(Attribute Syntax): Rename section to...
	(GNU Attribute Syntax): ...this.  Prune discussion of standard
	attribute syntax.  Fix cross-references.
2026-02-24 23:18:57 +00:00
David Malcolm
fdc38baeea analyzer: fix ICE on (X + (-X)) for vectors [PR124188]
gcc/analyzer/ChangeLog:
	PR analyzer/124188
	* region-model-manager.cc
	(region_model_manager::maybe_fold_binop): Don't attempt to fold
	X + (-X) to zero for vector types.

gcc/testsuite/ChangeLog:
	PR analyzer/124188
	* c-c++-common/analyzer/vector-ice-pr124188.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2026-02-24 17:16:59 -05:00
David Malcolm
761e0d3d78 analyzer: fix ICE on division by zero [PR124195]
gcc/analyzer/ChangeLog:
	PR analyzer/124195
	* region-model-manager.cc
	(region_model_manager::maybe_fold_binop): Bulletproof against
	division by zero by returning "unknown".
	* region-model.cc (region_model::get_gassign_result): Bail out for
	division by zero.
	* svalue.cc (svalue::maybe_get_value_range): Rename to...
	(svalue::maybe_get_value_range_1): ...this.
	(constant_svalue::maybe_get_value_range): Rename to...
	(constant_svalue::maybe_get_value_range_1): ...this.
	(unknown_svalue::maybe_get_value_range): Rename to...
	(unknown_svalue::maybe_get_value_range_1): ...this.
	(unaryop_svalue::maybe_get_value_range): Rename to...
	(unaryop_svalue::maybe_get_value_range_1): ...this.
	(binop_svalue::maybe_get_value_range): Rename to...
	(binop_svalue::maybe_get_value_range_1): ...this.
	* svalue.h (svalue::maybe_get_value_range): Reimplement inline,
	asserting that if we get a result it is not undefined_p.  Use
	maybe_get_value_range_1 for the vfunc.
	(svalue::maybe_get_value_range_1): Rename from above.
	(constant_svalue::maybe_get_value_range): Rename to...
	(constant_svalue::maybe_get_value_range_1): ...this.
	(unknown_svalue::maybe_get_value_range): Rename to...
	(unknown_svalue::maybe_get_value_range_1): ...this.
	(unaryop_svalue::maybe_get_value_range): Rename to...
	(unaryop_svalue::maybe_get_value_range_1): ...this.
	(binop_svalue::maybe_get_value_range): Rename to...
	(binop_svalue::maybe_get_value_range_1): ...this.

gcc/testsuite/ChangeLog:
	PR analyzer/124195
	* c-c++-common/analyzer/divide-by-zero-1.c: New test.
	* c-c++-common/analyzer/divide-by-zero-pr124195-2.c: New test.
	* gcc.dg/analyzer/divide-by-zero-pr124195-1.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2026-02-24 17:16:58 -05:00
Robin Dapp
ad59051605 RISC-V: Change scratch constraint for _lra insns.
This fixes a latent bug on rv32 after the lra patch for PR123381.

We have those _lra insn_and_splits

(define_insn_and_split "*mov<V_FRACT:mode><P:mode>_lra"
  [(set (match_operand:V_FRACT 0 "reg_or_mem_operand" "=vr, m,vr")
	(match_operand:V_FRACT 1 "reg_or_mem_operand" "  m,vr,vr"))
   (clobber (match_scratch:P 2 "=&r,&r,X"))]

where the clobber constraint for the third alternative is 'X'.
This is supposed to express that we accept anything because we don't
need the scratch for that alternative anyway.

However, in mask_gather_load_run-11.c we create a mem

(insn 302 228 218 (parallel [
            (set (reg:RVVMF8BI 124 v28 [orig:214 mask__62.15 ] [214])
                (reg:RVVMF8BI 120 v24 [orig:354 MEM <vector(16) long long int> [(int64_t *)cond_32(D) + 768B] ] [354]))
            (clobber (mem/c:SI (plus:SI (reg/f:SI 2 sp)
                        (const_int 12 [0xc])) [3 %sfp+-324 S4 A32]))

that match_scratch does not handle, so we never split the insn.

This patch changes the constraint to 'r', this should work as we don't
make use of it anyway.

gcc/ChangeLog:

	* config/riscv/vector.md:  Change 'X' to 'r' in _lra insns.
2026-02-24 21:48:48 +01:00
Robin Dapp
ce6d82d19d RISC-V: theadvector specifics for vec_init and vec_extract. [PR124147]
The mask-mode vec_init and vec_extract expanders assume that we can
create QImode vectors with the same number of units as the mask mode
has.  XTheadVector does not have fractional-LMUL modes and we ICE when
trying to expand the actual insns.

An obvioius solution would be to simply disable the autovec expanders for
TARGET_XTHEADVECTOR but exactly these optab/mode combination has no fallback
in the common expansion code.  That's a known problem and should be fixed
separately in extract_bit_field_1.

For now, though, we do not need to use small modes and can go with full
vectors instead.  The excess elements don't matter.
To that end, this patch uses paradoxical subregs on the source (for
vec_extract) and on the destination (for vec_init), leaving the
remaining elements undefined.

In order to obtain the right "full vector" I needed to adjust
get_m1_mode slightly.  By default it returns a VLA mode so when
introducing a subreg like above we can have
  (subreg:full_vector_mode (reg:small_vls_vector_mode) 0)
where full_vector_mode is a VLA mode and small_vls_vector_mode is a VLS
mode.  This won't be a valid subreg so the patch adds a VLS_P
argument to get_m1_mode that returns a full VLS vector mode.

Regtested on rv64gcv_zvl512b.  As I didn't have theadvector hardware
available I made the new code paths unconditional (so they are active
for regular RVV) and re-tested.

	PR target/124147

gcc/ChangeLog:

	* config/riscv/autovec.md: Work around fractional-LMUL modes for
	TARGET_XTHEADVECTOR.
	* config/riscv/riscv-protos.h (get_m1_mode): Export.
	* config/riscv/riscv-v.cc (get_m1_mode): Allow to get a VLS m1
	vector.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/xtheadvector/pr124147.c: New test.
2026-02-24 21:48:48 +01:00
Robin Dapp
b2fc711494 lra: Perform cycle detection for moves with clobber. [PR123381]
In the PR code we have the somewhat rare case that we need to reload
a vector subreg of a scalar register, (subreg:V2HI (reg:DI)).
What complicates things is that the test is compiled with
-mrvv-vector-bits=zvl, so VLS-only mode.
Unfortunately, we can still get VLA-named modes that are actually VLS
modes (i.e. that have a constant number of units).

For moving real VLS modes we simply use

 (define_insn_and_split "*mov<mode>"
   [(set (match_operand:VLS_AVL_IMM 0 "reg_or_mem_operand" "=vr, m, vr")
 	(match_operand:VLS_AVL_IMM 1 "reg_or_mem_operand" "  m,vr, vr"))]

Here, lra recognizes cycle danger, quickly switches to the memory
alternative and the resulting code is as expected - we perform a vector
load from that memory the DImode reg was spilled to.

For VLA (named) modes the mov insn is

(define_insn_and_split "*mov<V_FRACT:mode><P:mode>_lra"
  [(set (match_operand:V_FRACT 0 "reg_or_mem_operand" "=vr, m,vr")
	(match_operand:V_FRACT 1 "reg_or_mem_operand" "  m,vr,vr"))
   (clobber (match_scratch:P 2 "=&r,&r,X"))]

The extra clobber here is an optimization:  For modes smaller than a full
register we want to store the actual size, rather than always the full
vector size.  If that mode size happens to exceed 32, instead of using an
immediate we need to move it to a register so vsetvl can consume it.

As the second mov insn above has three operands lra never checks for cycle
danger and promptly creates a cycle :)  This patch loosens the conditions on
the cycle check by allowing a third operand that is a clobber.

	PR rtl-optimization/123381

gcc/ChangeLog:

	* lra-constraints.cc (process_alt_operands): Detect cycles in
	three-operand moves with clobber.
	(curr_insn_transform): Don't write back a scratch operand.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr123381.c: New test.
2026-02-24 21:48:47 +01:00
Piyush Raj
7ee67c1388 contrib: add bpf-vmtest-tool to test BPF programs
This patch adds the bpf-vmtest-tool subdirectory under contrib which tests
BPF programs under a live kernel using a QEMU VM.  It can build the
specified kernel version with eBPF support enabled
and stores it under $VMTEST_DIR

It can test BPF C source files and precompiled BPF object files against
the kernel verifier for errors.
When a BPF program is rejected by the kernel verifier,
the verifier logs are displayed.

$ python3 main.py --log-level ERROR vmtest -k 6.15 --bpf-src fail.c
BPF program failed to load
Verifier logs:
        btf_vmlinux is malformed
        0: R1=ctx() R10=fp0
        0: (81) r0 = *(s32 *)(r10 +4)
        invalid read from stack R10 off=4 size=4
        processed 1 insns (limit 1000000) max_states_per_insn 0 total_states 0 peak_states 0 mark_read 0

See the README for more examples.

The script uses vmtest (https://github.com/danobi/vmtest) to boot
the VM and run the program.  By default, it uses the host's root
("/") as the VM rootfs via the 9p filesystem, so only the kernel is
replaced during testing.

Tested with Python 3.9 and above.

contrib/ChangeLog:

	* bpf-vmtest-tool/README: New file.
	* bpf-vmtest-tool/bpf.py: New file.
	* bpf-vmtest-tool/config.py: New file.
	* bpf-vmtest-tool/kernel.py: New file.
	* bpf-vmtest-tool/main.py: New file.
	* bpf-vmtest-tool/pyproject.toml: New file.
	* bpf-vmtest-tool/tests/test_cli.py: New file.
	* bpf-vmtest-tool/utils.py: New file.
	* bpf-vmtest-tool/vm.py: New file.

Signed-off-by: Piyush Raj <piyushraj92739@gmail.com>
2026-02-24 21:34:48 +01:00
Wilco Dijkstra
b67918fdda AArch64: Use anchors for vector constants [PR 121240]
Enable anchors for vector constants - like FP, expand vector constants early
and place them in the constdata section.  Avoid unnecessary loads by expanding
simple cases using DUP.  Performance on SPECFP2017 is ~0.3% better, codesize
increases by 0.05% due to extra const data.

gcc:
	PR target/121240
	* config/aarch64/aarch64-simd.md (mov<mode>): Expand vector constants
	early.
	* config/aarch64/aarch64.cc (aarch64_select_rtx_section): Force
	vector immediates <= 16 bytes to constdata.

gcc/testsuite:
	PR target/121240
	* gcc.target/aarch64/const_create_using_fmov.c: Fix test.
	* gcc.target/aarch64/pr121240.c: Add new test.
	* gcc.target/aarch64/vec-init-single-const.c: Fix test.
	* gcc.target/aarch64/vect-cse-codegen.c: Fix test.
2026-02-24 19:45:13 +00:00
Tomasz Kamiński
7ff0e39d0d libstdc++: Replace check for exceptions in mdspan/at.cc.
Uses __cpp_lib_constexpr_exceptions, that better expresses
the intent.

libstdc++-v3/ChangeLog:

	* testsuite/23_containers/mdspan/at.cc: Updated guard.
2026-02-24 18:22:54 +01:00
Torbjörn SVENSSON
7f0f5e109c testsuite: arm: drop xfail for dg-bogus in bfloat_cpp_typecheck.C [PR124064]
After r11-6321-g550880a31688f1, the bogous errors are no longer emitted.

gcc/testsuite/ChangeLog:

	PR testsuite/124064
	* g++.target/arm/bfloat_cpp_typecheck.C: Drop xfail.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2026-02-24 18:08:14 +01:00
Torbjörn SVENSSON
45457c47a8 testsuite: arm: add -mfpu=auto to arm_v8_3a_complex_neon
gcc/testsuite/ChangeLog:

	* lib/target-supports.exp: Add -mfpu=auto to
	arm_v8_3a_complex_neon. This aligns with
	arm_v8_3a_fp16_complex_neon.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2026-02-24 18:08:13 +01:00
Tomasz Kamiński
4ae4340c20 libstdc++: Do not check exception at compile-time for mdspan::at for cow string.
Do not test the exception at compile time if _GLIBCXX_USE_CXX11_ABI
is not set, i.e. standard exceptions types are not supported.

libstdc++-v3/ChangeLog:

	* testsuite/23_containers/mdspan/at.cc: Updated test.
2026-02-24 18:03:18 +01:00
Eric Botcazou
66f81a788b Ada: Fix crash on iterated element association for Ordered_Maps
This is a regression present on the mainline and 15 branch: the compiler
crashes on an iterated element association for Ordered_Maps or similar
container types, because the type of the loop variable is not computed.

gcc/ada/
	PR ada/124224
	* sem_aggr.adb (Resolve_Container_Aggregate): Minor tweaks.
	(Resolve_Iterated_Association): Compute Typ on all paths.

gcc/testsuite/
	* gnat.dg/specs/aggr12.ads: New test.

Co-authored-by: Liam Powell <liam@liampwll.com>
2026-02-24 17:44:49 +01:00
Martin Jambor
02bc692a23 contrib: Skip Clang -Wreturn-type-c-linkage in rust-fmt.h
When compiling GCC Rust FE, clang gives the following warning:

/home/worker/buildworker/tiber-gcc-clang/build/gcc/rust/ast/rust-fmt.h:403:15: warning: 'collect_pieces' has C-linkage specified, but returns incomplete type 'FFIVec<Piece>' which could be incompatible with C [-Wreturn-type-c-linkage]
/home/worker/buildworker/tiber-gcc-clang/build/gcc/rust/ast/rust-fmt.h:406:15: warning: 'clone_pieces' has C-linkage specified, but returns incomplete type 'FFIVec<Piece>' which could be incompatible with C [-Wreturn-type-c-linkage]

I have raised this with GCC Rust folk on their Zulip chat and we
agreed the warning should be filtered out, at least fornow.  It is
tracked as https://github.com/Rust-GCC/gccrs/issues/4441 so it is not
forgotten but even there it seems that the outcome may be we'd just
ignore the warning forever, as far as I can tell.

contrib/ChangeLog:

2026-02-24  Martin Jambor  <mjambor@suse.cz>

	* filter-clang-warnings.py (skip_warning): Skip warning
	-Wreturn-type-c-linkage in rust/ast/rust-fmt.h.  Fix indentation of
	the entry for libiberty/sha1.c.
2026-02-24 17:37:17 +01:00